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System-on-chip design: Who's in charge here?








EE Times


Embedded-system design used to be simple: It meant standard ICs plus a little assembly code. Now it's complicated-it means new image, audio and network data types; megabytes of software; AAA batteries. What happens as complexity grows and the physical system shrinks? Easy answer: system-on-chip. More precisely, a new variety of application platforms combining logic, memory and interface ICs, plus matching software, each targeting a particular system class-wideband-CDMA phones, xDSL access concentrators, digital cameras and so on.

Ideally, we'd have one universal superchip that does it all, but software cannot turn a cell phone into a digital camera. Each system-on-chip (SoC) must be tuned to the protocols, interfaces and data types of the application, and be programmable to maximize silicon volume and market flexibility.

Who's in charge of collapsing multiple processors, memory, interconnect and all that software into a single chip? System architects ought to be. The goal of silicon, software and intellectual-property (IP) suppliers must be to support the demands of SoC designers. Here are four suggestions to help:

- Accessibility. System architecture, software and hardware design teams need a shared, up-to-date, secure and consistent picture of their platform. Internet-based specification tools deliver consistent hardware descriptions, software tools, run-time libraries and models with minimal overhead.

- Flexibility. The vertical industry structure is disintegrating as the architectural knowledge shifts to applications-focused system and chip companies. Portability of key design blocks gives these leaders best-of-breed technology, cost leverage and assured capacity.

- Matching hardware and software. Each hardware and software module must be provably correct and all these modules must be integrated into performance models, cycle-accurate development platforms, and power- and speed-optimized VLSI designs. Complete and consistent models, tools, real-time operating systems and hardware are critical.

- Scaling. Sometimes capabilities can be added via software, but major advances require new data types, operations and interfaces. Configurable processors can be key to easy scaling. They guarantee upward compatibility, yet allow seamless addition of instruction sets, novel memories, wide, deep execution pipelines and multiprocessing.

The fabrication, software, EDA and IP industries must help system designers maximize freedom and minimize risks and costs in creating SoC designs. These designers are embracing new technologies like the configurable processor because it puts them in charge.

Chris Rowen is President and CEO of Tensilica Inc. (Santa Clara, Calif.).










The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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