In this age of net-centric communication, makers of networking and datacom equipment are hungry for ways to boost bandwidth, reliability and scalability in their designs. For years, such equipment relied on shared-bus schemes like PCI as a fundamental interconnect technology. While such technology is still appropriate for some applications, shared buses have physical limits in slot count, performance and reliability that can't be ignored.

With that in mind, the industry is shifting to switch-fabric-based architectures. This shift pervades a vast segment spanning the broad category of network equipment. Everything from datacom system to telecom infrastructure equipment to local-area-network-linked servers are either moving to switch-ed topologies for the first time or shifting to more scalable types of switched architectures.

Articles in this week's section explore the rich innovation going on today in switch-fabric technology. Topics span the range from Infiniband design hurdles to in-box benefits of RapidIO, along with various on-chip switch schemes like SuperHyway for highly integrated system chips. Alternatives to crossbar switch approaches, such as ring architectures, are also explored. Rounding out the topic are articles focused on the software and system side of reliability that center on the goal of achieving so-called five-nines (99.999 percent) up-time reliability.

Among the early adopters of switched architectures were makers of local-area networks. Wide availability and low-cost manufacturing of switches based on shared-memory architecture helped move switch technology into that space. Problems arose when bandwidths raced past 20 Gbits/second. To address that issue, Power X Networks Inc. crafted a single-stage switch fabric. Its approach uses a synchronous, asymmetrical backplane technology at its embedded physical-layer links, rather than the standard asynchronous, symmetrical technology.

On the standards front, the two most important new switch-fabric technologies to emerge over the past year are Infiniband and RapidIO. At first glance these two schemes seem like competitors. Indeed, both are aimed at eventually replacing or at least displacing PCI. In reality, while there will be some overlap, the two schemes are aimed at very different problems. Infiniband was created to be the next generation of server I/O. Among the seven "steering members" of the Infiniband Trade Association are the largest server vendors, including Compaq, Dell, Hewlett-Packard, IBM, Intel and Sun. They account for 70 percent of all server shipments.

In his article, David Q. Taylor, Infiniband Program Manager at Agilent Technologies, describes a number of challenges to designers as they implemented Infiniband-based systems. These begin with its physical signaling layer. The architecture enables data transfers at 2.5 Gbits/s. However, because the clock is embedded in data, the data-stream's fundamental frequency is 1.25 GHz. Because Infiniband devices can have switching times as fast as 100 picoseconds, the frequency content of an Infiniband system can easily exceed 3 GHz, leading to design challenges that are truly microwave in nature.

Taylor remarks that the Infiniband design community will need to dust off many college textbooks on electromagnetics, as designers get reacquainted with concepts such as frequency domain, s-parameters and intersymbol interference, for example.

For its part, RapidIO is a switch-fabric spec aimed at network equipment makers. RapidIO was developed through a cooperative effort involving networking industry giants such as Alcatel, Cisco Systems, Lucent Technologies, Motorola and Nortel Networks. Richard O'Connor, vice president of marketing and business development, Tundra Semiconductor Corp. (a founding member of the RapidIO Trade Association), believes that RapidIO needs to address communications infrastructure vendors first. Such vendors typically develop their own proprietary interconnect systems. Once that goal is achieved, said O'Connor, then RapidIO needs to address the needs of those looking for contemporary computer-centric (or server-centric) interconnects.

While RapidIO and Infiniband are aimed at replacing PCI, it's clear that PCI won't disappear overnight. There's a huge and growing universe of legacy I/O that's PCI-based. Moreover, PCI is the most ubiquitous standard chip-to-chip interface ever to emerge in the history of computer architecture. Nearly every mainstream IC has PCI either embedded on chip or has a link via core logic to PCI. It will be a long while before Ethernet, SCSI and other I/O ICs emerge based on new switched-fabric architectures. Beyond the huge installed base of PCI, there's also an exploding market of CompactPCI-based systems and boards. Any new interconnect scheme will have to link to and coexist with that legacy if it's to take off.

In the CompactPCI space, Performance Technologies Inc. has developed a way to directly marry the worlds of CompactPCI and switched-packet-based technology. Last month it submitted a proposal for a new CompactPCI packet-switching backplane architecture to the PCI Industrial Computer Manufacturers Group, the standards body that controls the CompactPCI spec.

The proposed architecture, called Compact Packet Switching Backplane (cPSB), overlays an embedded Ethernet switching network on the CompactPCI backplane. cPSB improves the performance, scalability and reliability of CompactPCI while preserving its H.110 bus, mechanical, power and hot-swap attributes. In the cPSB definition, up to 20 link slots can be supported using a single fabric (packet-switching) slot in a 19-inch CompactPCI chassis.

Meanwhile, PLX Technology Inc. offers another way to marry the legacy I/O of PCI and CompactPCI with the any-to-any interconnect advantages of a switch fabric. To satisfy the conflicting requirements for more performance and preservation of investment in existing methodologies, Sebring Systems, a company acquired by PLX earlier this year, has developed a ring bus scheme. Originally called the Sebring Ring, the technology is expected to be announced in product form next month.

Software sees PCI

PLX's ring bus is PCI-software-transparent, requires no software to run and appears to the host as a set of PCI to PCI bridges. Data come into the switch fabric, are converted from PCI transactions into an exchange of fabric cells, sent across the switch fabric, then converted back into PCI transfers at the target node's switch-fabric controller.

PLX's ring-based switch fabric is transparent to the operating system and the BIOS and requires no changes in the PCI line cards or controllers. Because it is based on a high-speed, dual counter-rotating ring instead of a crossbar, the PLX switch fabric fits into backplane bus-based systems-requiring changes only to the backplane.

The trend toward switch-fabric interconnects has even moved down into the on-chip bus realm. Bus architectures designed for boards are seldom efficient on silicon. In conventional board design, signal count is directly related to cost, so that shared tri-state buses and multiplexed designs are common. In contrast for on-chip buses, signal count is less important, so it's possible to leverage the higher speeds and simplicity that nonmultiplexed signaling can offer.

With that in mind, STMicroelectronics and Hitachi developed a chip-level interconnection architecture called SuperHyway. It was crafted within the Virtual Socket Interface standard. Its purpose is to be the backbone for all superintegrated devices, based on the SuperH and ST20 processor core families. It's a packet-based transaction protocol layered on an integrated physical infrastructure.