At the Platform Conference to be held in San Jose, Calif., Jan. 23 and 24, Kentron (Wilmington, Mass.) will show how its quad-band memory technology can boost DRAM memory bandwidth of 100-MHz (200-MHz effective) double-data-rate (DDR) DRAM from 1.6 gigabytes/second to 3.2 Gbytes/s. In addition, the company promises that the technology will scale for each succeeding generation of DDR DRAM.

First proposed by Kentron last year, quad-band memory (QBM) technology has gone through preliminary testing and should be validated in time for the conference, said Bob Goodman, chief executive of Kentron. Product characterization should be completed by the first quarter.

Kentron's chief target is servers, where memory vendors are heavily pushing DDR, but Goodman said graphics, telecom equipment and consumer electronics are also potential applications.

Kentron expects to see the technology used in systems by late 2001, depending on whether it's adopted by chip set vendors.

"There are some chip set vendors we're in discussion with right now, and what they're saying is, 'Show me,' " Goodman said.

At the conference, Kentron plans to demonstrate a memory subsystem with four QBM-equipped memory modules interacting with a northbridge based on a programmable logic board from Actel Corp. The subsystem will show the modules with 200-MHz (effective) DDR memory running at 400 MHz, equivalent to 3.2 Gbytes/s of bandwidth.

The modules consist of two DDR components, one running at normal speed and the other with a 90-degree delay clock. Each DRAM is linked to a FET, which acts as a switch so that two clock-staggered DRAM components can together spit out 4 bits of data for every 10-nanosecond clock cycle. In effect, QBM delivers 4 bits per I/O cycle instead of 2 bits with normal DDR and 1 bit with standard SDRAM.

Rambus Inc. has already shown how it can pump out 4 bits per clock cycle with its future Quad Rambus Signaling Level, but Kentron's approach is fundamentally different. Rambus uses a chip interface technology that splits the voltage so that bits are represented in four voltage increments at every clock. QBM relies on the use of an external switching mechanism to toggle between two devices so that one bit comes out every quarter clock cycle.

"Instead of packing bits on the voltage, we're trying to pack bits on the time access and pack them tighter in one clock cycle," said Badawi Dweik, applications engineering manager for Kentron.

That feature could help DDR compete against current Rambus DRAMs for main memory for Pentium 4 processors, which use a quad-pumped interface, said InQuest analyst Bert McComas, who is organizing the Platform Conference.

"The 200-MHz (effective) DDR is extremely convenient because it yields the exact same front-side bus as the Pentium 4. So you can use the slowest DDR and apply QBM to get 3.2 Gbytes/s. Otherwise you would need 128-bit-wide DDR or two channels of Rambus," McComas said.

Skeptics may question the efficacy of running the memory with such tight timing parameters, McComas said, but that could be solved by using DDR parts that are rated faster than they are actually run in the system. "It's not like they can't specify a 266-MHz to run at 200 by 2. That will buy them a lot more guardbanding," he said.

Aside from better speed, the FETs serve to reduce the capacitive load of the system, which becomes more stressed with faster bus speeds and higher memory densities. "The FET switches allow you to access only the memory device that needs to be accessed," Goodman said.

QBM can also be applied to a 128-bit memory bus and can serve to double the data rate of SyncFlash flash memory devices, he added.

No memory controller makers have signed on to QBM yet, but Goodman said Kentron is in discussion with several. Among them are Via Technologies Inc., the largest third-party chip set manufacturer and an advocate of DDR, and Nvidia Corp., one of the premier makers of graphics chips for the PC that is now using DDR as buffer memory.

Goodman said he hopes to entice controller makers by touting QBM's simplicity as much as its performance. With QBM, controller makers can use the same timing spec as the DDR memory. The FETs, at about $1 a piece, are widely used for switching. And only one of four modules are operating at any one time, so capacitive loading is reduced.

"It's what we call an evolutionary change," Goodman said. "Everything is off-the-shelf."