The companies expect the scalable architecture to form the beating heart of a bottleneck-free broadband network, propelling the partners to commercial leadership in systems able to handle video, 3D images, speech recognition, interactive gaming and new user interfaces.

The goal is to have the first Cell products ready by 2004 or 2005, based on a "10S" 100-nm (0.10-micron) process technology that moves to commercial production early in 2003 at IBM. The goal is to marry the processors and a new OS with broadband capabilities, bandwidth available to some now but pervasive by then via DSL, cable modems, high-speed Ethernet and fiber networks.

IBM expects that Cell processors will help fill its 300-mm wafer fab now under construction in Fishkill, N.Y. Sony licensed IBM's 100-nm SOI process technology for use in its own fabs, while Toshiba indicated it would use its own 100-nm process to make Cell products.

The three companies will invest more than $400 million over the next five years in the joint project, which will be based at a design center within the IBM facility in Austin, Texas. About 300 people are expected to work on the project after the initial architecture implementation phase is completed.

"Cell is going to be like IBM's Deep Blue integrated on one chip," said Ken Kutaragi, chief executive officer of SCEI, referring to IBM's chess-playing supercomputer, which is based on a massively parallel architecture.

"One Cell processor will have, say, 1 teraflops performance. One thousand Cells make 1 petaflops performance. Then 1,000 of these 1,000 Cells can combine.

"We are planning to create a processor architecture that makes this network connection possible. We will focus on processors. The day when processors can truly link together will surely come. This project is such a huge challenge," said Kutaragi.

Bijan Davari, vice president of technology and emerging products at IBM Microelectronics, said the Cell architecture would be "scalable, and able to deal with the tradeoffs of performance, power and cost. Our ideas are still evolving, but the elements could be used in ways which are optimal, depending on which box they are used for. The same elements used for a handheld could be multiplied tenfold for ICs aimed at home entertainment systems. One or more chips could be used in a package, depending on the application."

Davari said the concept is not a VLIW architecture, by today's definition. The basic design would include a processing element, strong floating point, and other basic building blocks. "None of this has been 100 percent decided, but the basic idea is that each chip would have five to 10 different elements."

Though the version of Cell aimed at the 100-nm process technology would not include embedded DRAM on the main processor chip, other chips, including a graphics processor, would include eDRAM, Davari said. Then, as process technology moves to 70-nm and 50-nm design rules, embedded DRAM likely would become practical for the main processing elements, he said.

Kutaragi used biological terms, comparing the processors to a body's cells and the broadband network to a society of many sentient beings.

The ideal network would be connected by optical fiber with bandwidth faster than main memory bandwidth. The broadband network itself could work as a massively parallel computer, he suggested.

Kutaragi said the goal is to shake out the possibilities of creating a new-concept broadband network. The problem with current network equipment such as servers, routers and switchers, he contended, is that they are based on computer architectures that date back to the 1950s. From this perspective, current client-server architectures would act as bottlenecks for future broadband networks, he said.

"When the processor is ready around 2005, the installation will begin, and I hope that 100 million to 200 million processors will . . . form what we can really call a broadband network by 2010," Kutaragi said.

Davari said today's personal computer processor architectures have evolved over the years. "We are optimizing Cell from the ground up, instead of staying within the boundaries of today's PC architectures. Our goal is to create a system that is highly efficient at manipulating IP packets over the broadband network."

Lisa Su, director of emerging products at IBM Microeletronics, said, "We started with a clean sheet of paper and sat down and tried to imagine what sort of processor we'd need five years from now."

Kutaragi said the three companies started joint work about a year ago and have drafted rough outlines such as core cell structure, computing performance and implementation strategies. Kutaragi said he has accumulated an inch-thick dossier and has already applied for a smattering of patents on Cell processor-related technologies. "We have the basics of the architecture, but there are still challenges — the largest issues are how to design the microcode and how to give the Cell processor real scalability."

Best processes possible

Kutaragi said, "Toshiba has strength in system-on-chip technology and in digital consumer electronics. Among semiconductor companies, it has a real capability to go all the way from R&D to implementation. Historically, the company is our best partner. IBM is essential to this project for its advanced semiconductor technology, and as the founder of modern-day computers," said Kutaragi.

Davari, who has played an instrumental role in getting IBM to use copper, low-k dielectrics and silicon-on-insulator (SOI) technologies ahead of the rest of the industry, said, "The main point is that this is the first time we have licensed our SOI process to anybody. Sony is the first, and it will be able to use our 100-nm technology without any compromises. This is not a low-cost derivative, this is the best technology we have to offer."

Toshiba plans to use its own 0.1 micron process, which is under development at its R&D center in Yokohama. Though development of the Cell processor will be based on IBM's process, Toshiba engineers are confident that they can apply its process for the Cell processor, said a Toshiba spokesman.

Toshiba has worked with SCEI to establish production of the 13.5-million-transistor Emotion Engine for PlayStation 2. Getting the Emotion Engine done on time provided Sony with confidence in Toshiba's design and production technology, said the Toshiba spokesman.

Yasuo Morimoto, company president and chief executive of Toshiba Corp.'s Semiconductor Company, told EE Times that "as a result of this joint project, we expect our LSI business to expand rapidly, not only with the processor alone, but also with the development of other LSIs such as memories, to provide a comprehensive solution."

As the project unfolds, the three companies will broaden and deepen their engineering base, building a joint R&D center at IBM in Austin, Texas, with initial development guided by 20 to 30 architects. Now that the Cell project has gone public, IBM is launching a recruiting drive, said Su, who earlier headed up a team working on 70-nm process technology development.

Kutaragi said the operating system for a global-scale, super-parallel processor network remains a huge hurdle. Ideally, the OS would be developed in an open environment, much as Linux has developed. "It should be challenging and stimulating, as it is based on a new paradigm. It will be mankind's common property, so we want to invite wide participation."

SCEI and other parts of the Sony group will use the processor for various consumer products. Toshiba also plans to use it for digital consumer products that connect to networks, such as home LANs. IBM's main aim will also be to emphasize consumer-oriented applications, Su said.