The Horizon GT-96122 for 64-bit MIPS-architecture processors and the GT-96132 for 64-bit PowerPC-based systems are among the first router chips able to deliver telecom-quality voice and real-time video services over Ethernet LANs and the Internet, said Thad Omura, the division's senior product-marketing manager. Omura suggested that the chips, for use in next-generation enterprise voice/data and video routers, will slash the cost of voice-over-IP and streaming-video services, enabling mass deployment.

The chips enable Layer 5 quality of service (QoS) with integrated interfaces that connect to wide- and local-area networks. Omura said Layer 5 QoS is critical for converged communications over the Internet, since multimedia packets have value only if they arrive on time and in sequence.

The chips also offer full-bandwidth data flow prioritization, bandwidth allocation and data management, and they are based on a scalable architecture that leverages hardware and software development across a family of products. The architecture helps lower R&D costs and speeds OEMs' time-to-market, Omura said.

Both devices integrate a NetGX coprocessor, which is a customized version of Tensilica's Xtensa II CPU core. The coprocessor relieves the host CPU from compute-intensive tasks such as wire-speed QoS flow classification, 3DES encryption, packet and message authentication, and checksum error detection and correction. It also routes packets between the chips' WAN and LAN interfaces.

The chips contain a system controller with SDRAM and PCI interfaces, a DMA and interrupt controller, and watchdog timers and counters. Omura said customers with either the Galileo GT-64120A MIPS-system controller or GT-64130 PowerPC-system controller can use their existing software-compatible code when adding new WAN, LAN and packet-processing capabilities.

Development aids include hardware reference designs and software operating-system support packages. The EV-96122-RM7000A development board is available to evaluate the GT-96122 with the RM7000A MIPS CPU from PMC-Sierra Inc., and the EV-96132-MPC-750 board does the same job for the GT-96132 with the Motorola MPC750 PowerPC CPU.

RS-232 (UART), low-voltage differential-signaling, V.35, high-bit-rate DSL, channelized T1/E1 and fractional T3 WAN modules are available to plug directly into the main platform and help developers re-create their system environment prior to manufacturing.

Full schematics, manual and Gerber files are offered for all boards, and for a WindRiver Systems VxWorks board support package. Linux OS support is available from MontaVista Software. Software drivers are also available.

GNU-compatible compilers and debuggers are included in an environment for developing custom software for the NetGX coprocessor, and flow-classification and IPSec software is available for designers who want to customize their systems with QoS and security features.

The MIPS-compatible GT-96122 comes in a 492-pin ball grid array package and the PowerPC-compatible GT-96132 in a 556-pin BGA. Each is available with100-MHz or 83-MHz clock rates. In quantities of 10,000, the 100-MHz GT-96122 is priced at $98 and the 83-MHz version at $83.30. GT-96132 prices are $106 and $90.10 respectively.

The EV-96122-RM7000A and EV-96132-MPC750 development boards are $7,995 each, and WAN modules go for $495. Samples of the GT-96122 and GT-96132 are available now, with production quantities planned later this year. Reference design platforms are available.

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EETInfo No. 618