For now, researchers are concentrating on building a memory big enough to be worthwhile — 2 Gbytes — yet small enough to integrate with the rest of the system. In the MEMS memory, hundreds of microelectromechanical probes each interrogate a small array of positions on a magnetic medium. Though the researchers have yet to construct a prototype, their work represents a new approach to the next stage of storage miniaturization, one that is also being pursued by companies like IBM and Hewlett-Packard.

"The combination of ruggedness, low power consumption, low cost and high storage capacity will make these devices indispensable," said Richard Carley, a professor of electrical and computer engineering and director of the Center for Highly Integrated Information Processing and Storage Systems at Carnegie Mellon (Pittsburgh).

Carley said NASA has given Carnegie Mellon a research award to pursue the design of so-called integrated MEMS storage devices (IMSDs) for satellites. "One of the earliest drivers for IMSDs will be volume and mass critical applications," he said. "For example, planned low-earth-orbit microsatellites will need large amounts of storage capacity to buffer data as it is relayed around the world. However, even a micro-disk drive would be too large to fit into these satellites."

Chuck Morehouse, director of the Information Storage Technology Laboratory (Palo Alto, Calif.), called Carnegie Mellon's work in the area some of the best in the world. He sees the market for the new systems, when they arrive, as being very different than for existing hard drives. "The MEMS-based devices will first go into use where portability is important — low weight, high data density, low power consumption, rugged, modest capacity — not the same capacity as desktop hard-drive storage."

Low cost

The devices will be useful, Carley said, in low-cost, 1- to 10-Gbyte applications. "For example, future intelligent cell phones will need large amounts of local storage for programs, personal data and downloaded applets, etc. E2PROM will be too expensive and disk drives will be too expensive, too bulky and too power hungry." Other examples of this kind of consumer product, he said, are digital cameras, an emerging class of smart toys, and smart VCRs.

Conventional chip-based memories rely on lithography improvements for miniaturization. Essentially, they consist of small circuits that have to be at least a few times the minimum lithographic line width in height and width. According to the International Technology Roadmap for Semiconductors, which forecasts progress in computing technology, lithography will not produce 2-Gbyte chips until at least 2011. Today's commercial process, at 180 nanometers, can only provide storage densities up to a few tens of megabytes per square centimeter.

But micromechanical-probe memories — which use a small cantilever tip to address a point on some sensitive material — can already reach useful densities for miniature hard disks, at least in theory. Probe tips can detect individual features as small as 30 nm. If this power is used effectively, the areal density could be 1 Gbyte/cm² or more. The question is how to exploit the technology in a fast, single-chip configuration.

The Carnegie Mellon team has come up with a scheme that it hopes will use the full area of the memory material, keep the speed high and accommodate various alignment problems. First, an array of read/write tips is fabricated onto the top of a chip that has the rest of the computer system laid down around and underneath it. Then a second wafer, with its bottom surface covered by some magnetic medium, is suspended above the probes.

To use every bit of the memory, the probe tip must be scanned over the same area within the memory as the probe circuit takes up within its array. Carnegie Mellon achieves this by scanning the entire medium (the top wafer, known as a "media sled") over the bottom. Moving the individual probes by the required scanning distance — 100 microns — would not be possible because of limitations on movement imposed by MEMS technology. As a result, the probes are essentially passive when addressing individual bits. All the necessary movement is performed by the medium.

The probe tips are also microactuated in two dimensions, however, to keep the system aligned. In particular, two distortions need to be compensated for: thermal variations in the chips and curvature of the two wafers, especially that carrying the medium.

The Carnegie Mellon researchers said a difference of 5° across an 8 x 8-mm media sled can produce an error of a few hundred nanometers, which must be removed. In one proposed design, comb drives provide the lateral displacement in the x-direction to compensate for this. In the y-direction, any errors are removed through electronic signal tracking. A second actuator, this time in the z-direction, compensates for curvature and mechanical instability.

Carley said the MEMS devices offer a "much smaller physical size and mass/unit storage capacity than any other storage modality," and do so at the "lowest cost in the 1- to 10-Gbyte capacity range." Other advantages, he said, include high reliability (because of redundancy in the large probe-tip arrays), high data rate (through parallellism), low power consumption and environmental ruggedness.

As work progresses, technical challenges appear both numerous and inevitable. Though his company is working on a similar approach, HP's Morehouse sees the read-write mechanism, the MEMS microactuator and the packaging as potential problems. In addition, he said, "silicon MEMS uses silicon, which is expensive in large quantities. It will be difficult to amass large areas of storage."

Reliability issues

Carley agreed that the read-write mechanism will be an issue. "The primary breakthrough needed to enable IMSDs is the development and demonstration of a reliable, robust probe-tip/media combination." He said it must be nonvolatile (a greater than 10-year lifetime), rewritable, have high areal storage density (more than 1,000 bits/micron²) and be compatible with the MEMS manufacturing process.

In addition, he pointed to tight integration between MEMS and electronics as an important issue. "A system integration challenge for building efficient IMSDs is the integration of the control and channel electronics with the probe tip array." For example, Carley said, IBM's Millipede uses a 32 x 32 array of probe tips, but only 32 can be used at a time because of row column addressing, designed to reduce the number of I/O pads.

"Practical implementations of future systems would seem to demand integration of the probe tips into a standard electronics IC substrate," he said. "The work we are pursuing . . . proposes to build the magnetic probe tip array on top of a standard CMOS electronics wafer."

From a marketing standpoint, further disadvantages include cost, access time and data rates. "The cost per bit stored of IMSDs is likely to be significantly higher than that of hard-disk drives. Therefore, when the other advantages of IMSDs — size, ruggedness and low power, for example — are not important, and the total required storage capacity is high — more than 100 Gbytes — then IMSDs will not be a cost-effective solution," said Carley. And, he said, "For applications in which cost is no object, it will always remain the case that a large array of battery-backed-up RAM will offer better performance than an IMSD."

Despite these issues, HP's Morehouse is hopeful, both for the technology in general and the work being done at Carnegie Mellon in particular. "MEMS memories hold the promise of the highest possible areal densities for data storage," he said, calling the Carnegie Mellon program one of the few open collaborations. It should be "very valuable in bringing precompetitive ideas together to hasten the solution of some common technical issues faced by researchers trying to bring MEMS-based storage to the marketplace," he said.