The SST89E554, V554, E554RC, V554RC, E564, V564, E564RD and V564RD are based on a proprietary architecture that maps flash memory into two independent blocks. The primary block, which occupies the microcontroller's internal ROM space, contains either 32 or 64 kbytes of SuperFlash E2PROM in 128-byte sectors. The secondary memory block contains 8 kbytes of SuperFlash E2PROM in 128-byte sectors. It can be used for electronically erasable, nonvolatile data or code storage.

The memory design supports in-application programming (IAP) and read-while-write concurrent operation. IAP mode allows the CPU to run user programs from one flash block while concurrently servicing a flash programming operation in the background on the other block. It allows a device to be reprogrammed remotely while it is online or in use.

Besides the flash, the controllers include 1 kbyte of on-chip SRAM-four times the amount available with most 8051-compatible MCUs, according to Eugene Feng, business director of SST's Application Specific Products Group. Clock speeds are up to 40 MHz.

The devices can be reprogrammed from a single 3-V or 5-V power supply. Proprietary SoftLock security features prevent accidental overwriting of program memory, as well as software piracy.

Sample quantities of the 3-V SST89V554 and V564 will be available this month, priced at $3.15 and $3.50 in quantities of 100,000. Both come in PLCC packages.

Samples of the 3-V SST89-V554RC and 564RD, also in PLCCs, will be available in October. They are priced at $3.35 and $3.70, respectively. The 5-V SST89E554, 554RC, 564 and 564RD, all in PLCCs, will sample in November. Prices are $3.05, $3.25, $3.40 and $3.60, respectively.

Call (408) 735-9110
www.ssti.com
EETInfo No. 607