SAN JOSE, Calif. ATI Technologies Inc. on Wednesday (Oct. 17) offered a peek at what it takes to design a microprocessor for the next generation of consumer electronics systems. Its Xilleon 220 architecture, designed as a new engine for digital TV, packs practically every conceivable audio/video decoding function, conditional access, support for multiple transport and I/O functions, and a MIPS32 RISC processor core all in one chip.
ATI showed the device at the Microprocessor Forum here, claiming that no competitor working on digital TV ICs has integrated so many functions in a single chip before.
But throwing in a host of functions appears to be the trend of the day. Also this week, STMicroelectronics announced a set-top box chip designed to bring personal video recorder capability to the mass market. Equipped with the ST20 32-bit system CPU, the new STi5514 allows concurrent demultiplexing of up to three transport streams; multiple descrambling modes such as DVB and DES; as well as multiple conditional-access systems.
These chips may be in the forefront of a wave of feature-rich devices in the consumer market. Markus Levy, senior analyst at the Microprocessor Report, said that consumer OEMs must go beyond megahertz and use "a discerning eye" in evaluating silicon. Differentiation will involve an examination of detailed functions, he said, such as support for peripherals and I/Os, high-quality video performance and graphics capabilities. "You need to look for what a chip does, and what it can do," Levy said.
Second attempt
For ATI, with a background in the PC market, Xilleon represents a second attempt to crack the consumer electronics market. The company's earlier Rage HDTV chip was designed to the spec of the General Instrument/Motorola advanced HD-enabled cable set-top box, called DCT-5000. "Unfortunately, the HD market didn't take off, and its spec didn't respond to the needs of the global market very well," said Daniel Eiref, vice president of technology in ATI's consumer products group.
In designing Xilleon, ATI made a judicious decision to keep the chip much more generic, and concluded that it's best to put everything in one die, said Eiref. The chip can be designed into a variety of consumer systems for the global market, he said, ranging from integrated digital TVs with satellite reception, DSL home media gateways and wireless digital TV pads, to all manner of set-top boxes, including cable, Europe's Multimedia Home Platform (MHP) set-top and Japan's Broadcast Satellite digital set-top.
Xilleon is capable of processing and time-shifting multiple video streams from multiple tuners. More specifically, it can decode two HDTV streams or eight standard-definition TV streams. Its dual-display engine allows one set-top box to drive two TVs with separate programming, and displaying separate content. Xilleon also supports multiple transport demultiplexing and multiple conditional-access systems, including DirecTV, DVB, CSS, 3DES and DES.
It integrates all the I/O ports necessary to build an advanced set-top, ATI said, including PCI, USB, EIDE, IR, serial, I2C, AC-97, Flexbus, LPC and multiple general-purpose I/Os.
The chip comes with two separate video encoders, each supporting all regional video formats including PAL, NTSC and Secam, and all interface formats including composite, S-Video, RGB component and Scart.
Xilleon also takes advantage of ATI's expertise in graphics engines accumulated in the PC world. Unlike other embedded 3-D engines, Xilleon offers PC-quality 3-D graphics performance and compatibility with all 3-D application programming interfaces including Direct3D, OpenGL and BroadcastCL.
ATI claims that the high-speed, 300-MHz MIPS RISC engine makes Xilleon stand out. The processing power of competitors' chips often hovers at around 150 MHz. The powerful CPU core "makes a big difference" in executing sophisticated Java applets in real-time, said Eiref. "Particularly in running Europe's MHP applications, something like a 150-MHz CPU doesn't give you satisfactory performance."
ATI has licensed from MIPS Technologies Inc. its MIPS32 core, but ATI declined to say how its engineers found a way to run the core at 300 MHz. "It's a secret sauce," said Eiref.
Feature overkill?
Loading a generic chip with so many features and function blocks begs the question of whether Xilleon might be overkill for some applications. It can handle the requirements of Europe's MHP, for example, but Europe's Digital Video Broadcast world does not require HDTV decoding capabilities.
ATI, however, believes in its common back-end approach with multistandard support. "Customers invest a lot in software," Eiref said. If they could develop a variety of DTV products for a number of countries using existing software, "it improves the time-to-market tremendously."
STMicroelectronics could argue its own advantage in the area of software reuse. That company's new STi5514 device is backward software compatible with ST's successful STi4412, of which more than 8 million units have been shipped.
The single-chip STi5514 integrates an audio/video MPEG-2 decoder, advanced display and graphics features, a digital video encoder and essential system peripheral functions such as interfaces for external memory, IEEE 1394, I2C, teletext, smart cards and hard-disk drive. The enhanced ST20C2+ CPU provides 166-MHz clock options, according to STMicroelectronics.
Solo or peer mode
ATI, meanwhile, said its chip offers scalable performance by means of two modes of operation, peer and solo. In solo mode the built-in MIPS CPU runs the target operating system and Xilleon is the PCI bus master. In peer mode, an external CPU runs the operating system and Xilleon operates as a slave device. Thus, OEMs have two choices. They can build a set-top with an external CPU, using Xilleon to provide all video, audio and I/O processing. Or they can opt for a complete Xilleon-based set-top back end with integrated CPU.
The memory architecture is also scalable. ATI engineers made available up to 3 Gbytes/second of memory bandwidth on Xilleon, with an advanced arbitration scheme and 128 direct memory access channels. Memory is key in set-top applications, Eiref noted. For example, decoding one HDTV stream could hog 600 Mbytes/s of memory bandwidth, while graphics rendering needs 100 Mbytes/s and an on-chip processor takes another 100 Mbytes/s.
ATI will be sampling the Xilleon at the end of this month, with mass production slated for the first quarter of 2002. Xilleon will be fabricated at Taiwan Semiconductor Manufacturing Co., but ATI declined to say whether it will use an 0.18-micron process.
STMicroelectronics is already sampling the STi5514, and plans to ramp up volume production in December. The device, priced at $25 in quantities of 100,000, will be manufactured in 0.18-micron process technology.
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