The most promising results came from by Yu Min Lee of the University of Wisconsin, Madison, who advocated a transmission-line modeling technique for approximating power grid losses across an IC.

Elsewhere, Xuan Zeng of Fudan University (Shanghai, China) and Dian Zhou of the University of Texas (Richardson) suggested a means to model analog circuits with collocated wavelets. Walter Daems and Georges Gielen of the Katholiek Universiteit of Leuven (Belgium) showed somewhat inconclusive experiments with signomial and posynomial performance models, the latter used to simplify Spice matrix equations.

Modeling trade-offs

All analog modeling embodies a trade-off between simulation accuracy and computer run-time. Spice circuit simulation remains the standard for accuracy, but because it uses a continuous-time reference when calculating the rise and fall of voltages and currents over time, even the smallest circuits can take literally days and weeks to simulate. A dc analysis of an 80,000-node circuit will take six hours, said Wisconsin's Lee. A million-node circuit will need exponentially more time, he said.

Behavioral-level modeling is believed to dramatically speed simulation, but accuracy trails off — especially in modeling transitions such as rapid rises in voltage or current. Researchers are seeking mathematical representations that are highly accurate, but less computationally cumbersome than Spice equations.

Wisconsin's Lee said that power grids could most easily be modeled with behavioral techniques. Accuracy could be maintained by combining a transmission-line modeling method with a variation on finite-difference methods called alternating-direction implicit, said Lee. This method turned out to be 1,000 times faster than Spice, yet generated closely matched results, he said.

More exotic was the wavelet approach of a Fudan University team. The technique required them to examine the voltage and current envelopes generated by sine wave segments, or "wavelets," which are relatively easy to model mathematically. Multiple wavelets could be used to model changing envelopes by altering their collocation coordinates; higher-frequency wavelets could model the segments of the envelope that changed most rapidly.

Mathematically, this is very much like modeling a voltage-to-frequency converter, said Zeng, who used the technique to model voltage-controlled oscillators and switched-capacitor circuits, which were partitioned into four memory cells. Zeng remained dubious of polynomial expansion techniques, saying their small-signal and large-signal output responses were difficult to correlate with the input.

Posynomial response models — those reflecting a highly constricted polynomial function — were explored by Katholiek Universiteit researchers. Posynomial and signomial functions lend themselves well to computer generation, said Daems. And combined with Spice behavioral models, they will simulate accurately and quickly.

Experiments with a CMOS transconductance amplifier, however, yielded variable results. In some cases, simulated voltages and currents were within 1 or 2 percent of Spice accuracy, the Belgian team reported. In other cases, results were 600 percent off. These errors would have to be cleaned up before a posynomial model generator could be put to widespread use, Daems acknowledged.

"Check with us at the next DAC Design Automation Conference," he said.