Several chip companies have sampled the parts necessary for OC-768 transponders, including the transmission and receiving photonics (but not the 40-Gbit/s lasers themselves), and the multiplexer and demultiplexer chips that split the 40-Gbit/s data stream into smaller parallel streams to communicate with CMOS framers.

Module vendor GTran Inc. and startup Inphi Corp. recently announced OC-768 products based on their own InP process technologies. Separately, Vitesse Semiconductor Corp. has begun sampling OC-768 devices this month.

Most vendors agree that while OC-768 devices will ship next year, the volume market won't arrive until 2003. But that means design cycles for OC-768 are starting up now, making it a crucial time for chip makers to get a foot in the door, said Loi Nguyen, chief executive of Inphi (Westlake Village, Calif.).

In some ways, the delay is a blessing. "When we started the company in 2000, we thought we were late to market," but the stalled economy gave Inphi "a little breathing room" to complete its products, Nguyen said.

The devices required for an OC-768 transponder are fairly fixed, although vendors will begin integrating them in different permutations. Most companies are producing a 1:4 mux/demux pair, expecting to connect those chips to a 4:16 mux/demux pair made of CMOS, which can easily handle the slower, 10-Gbit/s signals. Other devices required are a modulator and modulator driver for the transmit side and a transimpedance amplifier and photodiode on the receive side. Companies are sampling all these devices now, in varying stages of integration, in most cases looking for customer feedback that will influence final or next-generation designs.

Vitesse had declared as early as March 2000 that its OC-768 devices would be InP-based. TRW Inc. spin-off >Velocium likewise settled on InP because of the integration possibilities. "You can integrate the optical components with InP. That is fundamentally different from gallium arsenide, SiGe or CMOS," said Dwight Streit, president of Velocium.

AMCC's silicon germanium

SiGe offers its own set of integration possibilities, however — a factor that led Applied Micro Circuits Corp. (AMCC) to stick with SiGe instead of switching to InP.

Vitesse is sampling bare-die forms of InP devices built from its 0.8-micron heterojunction bipolar transistor (HBT) process. The first of the chips to ship in packaged form will be a 43-Gbit/s 4:1 multiplexer, which should be available in January. The corresponding 1:4 demux chip is running "basically a month behind the mux," said Alan Huelsman, director of Vitesse's InP efforts.

Vitesse's high-speed InP road map includes two OC-192 devices, "since the 40-Gig market is still a subject of some debate," Huelsman said. Vitesse is developing an OC-192 photodiode with layout tweaks intended to make the device fit more easily in a module. And the company is combining a photodetector and transimpedance amp in a single device, its first attempt at optical-electronic integration.

Separately, GTran last week announced 1:4 and 4:1 mux/demux parts for OC-768. Both operate at 43 Gbits/s and higher, although company officials haven't disclosed the upper speeds of their InP process. GTran will use its InP devices in-house to produce transponder modules, which it hopes to begin sampling in the first quarter.

Inphi, for its part, claims to have achieved clock speeds of 50 Gbits/s with its proprietary InP process. The company this week plans to announce it has begun sampling a mux/demux pair of devices that connect four 12.5-Gbit/s streams to yield a single 50-Gbit/s stream. The devices were first demonstrated in October.

Inphi has partnered with an unidentified chip vendor that is providing 12.5-Gbit/s CMOS devices for the so-called 16:4 mux step.

Velocium will produce InP devices for OC-768 using TRW's 4-inch fabrication facility, which is also being leased out as an InP foundry. Anadigics Inc. is similarly prepping a line of OC-768 devices in InP, and it recently purchased a photodiode manufacturer to fortify its InP arsenal.

IBM and AMCC, meanwhile, reportedly are sticking with SiGe. But InP vendors questioned SiGe's viability in OC-768 spaces, and a few noted that OC-768 SiGe devices will multiplex two 20-GHz clocks to form a 40-Gbit/s pulse. The extra step could add jitter to the clock signal, potentially causing trouble in sensitive Sonet environments.

"There's some question whether SiGe can really do the job for long-range telecom," Velocium's Streit said.

Indium phosphide's higher speeds allow devices like clock multiplier units to run at line speed, Vitesse's Huelsman said. "By doing it at 40 Gbits/s, you gain a little bit of jitter tolerance," he said.

Laws of physics

Crucial to most of the InP efforts so far are homegrown design techniques and process technologies, both necessary to combat the difficult physics that arise at 40 Gbits/s. For example, microwave design techniques come into play, because a 40-GHz frequency yields a signal wavelength short enough to create interferences inside the package, leading to signal loss.

"At 40 Gbits/s, you have to understand the microwave characteristics of these parts" and use tools that will properly extract parasitics from microwave effects, Streit said.

Some companies hope to use process technology as a selling point. Inphi officials claim a breakthrough in InP, having developed a process that combines crucial elements of microwave and analog design. In addition, Inphi models inductances as well as capacitances in its circuits, preventing bubbles of inductance that can increase the power requirement of a chip.

Inphi claims its inductance extraction is unique, but other developers said they similarly extract inductances because it's necessary at such high speeds, particularly for signals that go off-chip. To claim to handle both inductance and capacitance is "like saying 'I can steer and at the same time use the brake and the throttle,' " Streit said.

Inphi also notes that its first mux/demux chips are targeting 50-Gbit/s speeds, necessary for some companies' nonstandard forward-error-correction (FEC) algorithms, which add 25 percent to a payload. But competitors aren't convinced that 50 Gbits/s is crucial yet.

For example, Vitesse claims to have a proprietary FEC algorithm that adds a 7 percent overhead for 43-Gbit/s speeds while providing the same gains as FEC with 25 percent overhead. Velocium, meanwhile, has already produced military parts with frequencies exceeding 100 GHz. A more practical target is 46 to 48 Gbits/s, Streit said.

Speed comes second

It's likely that competitors will emphasize power consumption rather than speed anyway, since their OEM customers are scrambling to lower the power requirements of their boxes. An unofficial multisource agreement for OC-768 transponders suggests a power budget of 10 W or less for the entire package.

Power comparisons are tricky, however, because the figures depend on the features and integration involved. Vitesse notes that its bare-die mux runs at about 1 W, but the more practical version, with the clock multiplier unit integrated, runs closer to 3 W. Overall, Vitesse believes it's prepared to offer full transponders at about 12 W.

Inphi, on the other hand, claims to have hit the 10-W mark by having brought its mux and demux chips down to 900 mW apiece. GTran's mux chip dissipates 2.5 W, while the demux chip dissipates 3 W, chief executive Frank Lee said.

Streit admitted that Velocium is dissatisfied with the power on its InP devices but said a next-generation InP process that the company hopes to have online next year will provide a "factor of 10 reduction in power." The devices sampling now are "socket holders" for those later parts, he said.

Process technology could factor in, too. Inphi and GTran have foundry deals with Global Communications Semiconductors Inc. for InP wafers, though each company has developed its own process steps to differentiate itself.

Velocium claims to have an advantage here because it has been producing InP parts for the military for some time.