Though surprisingly busy and upbeat considering the drag in the U.S. economy, the conference was hardly a throwback to the supercomputing heyday of the 1980s. Virtually the only familiar name in large vector platforms was Cray (Seattle), still pioneering new architectures after its merger with Tera Computer Inc.

Instead, manufacturers of large server-cluster architectures, such as IBM, Sun, Hewlett-Packard and SGI, took center stage, reflecting the fact that distributed servers have replaced virtually all integer and many vector applications for supercomputers. Also on hand were leaders in routing and Gigabit Ethernet switching, including Avici, Foundry Networks and Extreme Networks. In distributed supercomputing, the networking backbone plays the role of the compute platform itself.

Avici Systems (North Billerica, Mass.) gave the first peek at its rack-mounted Stackable Switch Router, prototypes of which have been shipped to Sandia National Labs for the U.S. Advanced Simulation and Computing Initiative (ASCI). Avici sees government customers as so critical to its success that co-founder Hank Zannini has been reassigned to a new role as vice president of federal sales.

Avici has contracts with the Department of Energy for ASCI and related programs, and is playing a key role in the Defense Department's Non-Classified IP Router network (and possibly the classified Secret IPRnet), as the defense and intelligence community shifts from an asynchronous transfer mode backbone to Internet Protocol.

For the largest dedicated vector programs, the government is playing a more direct role. When Cray was still a part of SGI Inc., the National Security Agency made an investment of undisclosed size to ensure that its SV2 supercomputer would be completed. NSA has termed the SV2 "absolutely essential to U.S. national security interests."

At the SC2001 show, Cray demonstrated early multichip modules and computing-module subsystems that will be integrated into the SV2, slated for late 2002 delivery to NSA and other government agencies.

As a gap-filler to commercial accounts, Cray is offering the SV1ex, and has signed an OEM pact with NEC Supercomputing for a full suite of vector platforms. The SV1ex, with only limited scaling potential, is targeted at automotive and aerospace applications with finite and bounded problem sets.

Meanwhile, Cray is eyeing the move in molecular biology from the Human Genome Project to future protein-folding studies. John Henderson, national manager for Cray Australia, said the scaling potential of the SV2 may make it a good fit for emerging "proteinomics" studies.

Cray is updating the chip-level architecture of the Multi-Streaming Processor used in the SV1, and packing the processor in a multichip module with copper interconnect, developed by IBM. Each MSP chip set can function as four two-pipe processors or as a single eight-pipe processor.

Clean break

The SV2, however, represents the first clean break in binary compatibility from older architectures, utilizing a fully proprietary instruction set. It combines best-of-breed features of T3 and SV architectures, but does not offer compatibility with earlier Cray vector platforms, the way the SV1 does.

The SV2 is the first Cray system to use a Rambus memory interface. It is also the first to use a special spray-cooling unit to dissipate heat in each four-processor module. A special evaporative-cooling spray is directed on the MCMs within a compute module, and the spray-cooling unit is integrated into either air-cooled or liquid-cooled rack computers. The air-cooled systems will expand to only four modules with 16 processors, but the liquid- and spray-cooled combination can expand to 16 modules with 64 processors.

Gary Shorrel, Cray SV1 project leader, said the memory expansion is as significant in the SV2 as the processor expandability. The SV2 will be the first machine to use a high-speed caching design pioneered in the SV1 within a distributed shared-memory architecture, using Rambus for processor-to-memory calls. Cray expects a peak-performance benchmark in the tens of teraflops. But perhaps more important, module density will make it possible to package systems ranked at close to a teraflop in a 4 x 7-foot footprint.

While SGI, which acquired and then sold off Cray, retains some intellectual-property rights that ensure continued ties between the companies, Cray has gained some independence in alliances since merging with Tera Computer. The company has signed a deal with Sun Microsystems Inc. to have the Sun Fire 6800 server specified as a preferred I/O node for both the Cray SV2 and Tera MTA2. The latter machine is on a separate development path within Cray's Seattle Tera groups.

Cray could still add SGI servers to that list, Henderson said, but the early agreement with Sun is an indicator of the company's independence.

The critical role of storage in the ASCI's Tri-Lab program linking Sandia, Lawrence Livermore and Los Alamos National Labs is evidenced by the contract DataDirect Networks Inc. (Los Angeles) announced in Denver. Livermore has bought five Silicon Storage Appliances (S2As) and 25 Tbytes of storage from DataDirect, to allow faster local-storage access than possible in traditional systems based on storage-area network and network-attached storage technology. Sandia has already purchased six of the S2A units along with 33 Tbytes of storage, for use in visualization and graphics-rendering programs used in ASCI.

Telecom gains

Even telecommunications products such as routers are gaining from government research efforts. Zannini said that Sandia — the first customer for Avici's original Tera-Switch Router (TSR) — drove the development of the Stackable Switch Router spin-off product, which had its first public demonstration on the show floor in Denver.

Helen Chen, staff scientist with the ASCI program at Sandia, said that ASCI is following the model of the labs' "Cplant" program, which is attempting to cobble together standard PC and server architectures to achieve supercomputer performance. The goal is to interconnect up to 10,000 PC and server nodes for execution of parallel tasks.

Avici's SSR and TSR platforms could scale to this level in theory, Chen said, but storage I/O remains a bottleneck, as Sandia awaits more-advanced interface standards for storage-area networks, such as iSCSI.

Meanwhile, Bob Donahue, director of business development for federal markets at Avici, said that large-scale defense networks like the Non-Classified IP Router network could potentially move to all-IP routing, once reliable standards for multiprotocol label switching are accepted. Zannini added that the only reason ATM gained a temporary foothold in classified networks was because of the lack of a Type 1 native IP encryptor. For now, users must input IP data from local networks into a certified ATM encryptor, and either reassemble that data for IP backbones or send it over legacy backbones.

Once IP encryptors for the highest-security networks are available, Avici expects a wholesale conversion to IP, and anticipates having an edge over the likes of Cisco Systems or Juniper Networks with its TSR and SSR platforms.

SSR boasts fault-tolerant Composite Links I/O and full MPLS packet-priority features, potentially suiting it for commercial use in supermetro regions against next-generation Sonet and even resilient packet ring networks. But Zannini said Avici is "waiting for the end of the carrier meltdown" before pushing the commercial applications.