TOKYO — Hitachi Ltd. has developed a flash memory cell that overcomes the slow write speeds of other cells able to store multiple bits. The company said it will apply the technology to create 1-Gbit flash chips and a 1-Gbyte card with a 10-Mbyte per second writing speed that it will bring to market within a year.
Hitachi described the Assist Gate-AND cell structure at the 2001 International Electron Devices Meeting in Washington this past week.
"To offer a gigabit-level flash memory at a sellable price, we aim to make a chip less than 100 square millimeters in size," said Katsuhiro Shimohigashi, corporate chief engineer for Hitachi. "If the 1-Gbit chip is that small, eight to nine chips and a controller can be stacked and packaged in one Multimedia Card. This means a tiny MMC card will have 1-Gbyte capacity, which can store about one hour of an MPEG-2 video program."
Hitachi intends to promote AG-AND flash memory for file storage applications, which require high-speed writing when used to store downloaded content.
"Thus far, it has been difficult to realize high-speed writing with multilevel memory," said Takashi Totsuka, senior manager of Hitachi's System Memory Business Unit. "With this AG-AND cell, we have realized a fast multilevel memory, which is fast enough to be used with IEEE 802.11a communications."
In its IEDM presentation, Hitachi reported that a four-bank memory achieved 20-Mbyte per second programming throughput. That speed is halves to 10 Mbytes/s when the technology is applied to a chip that stores multiple bits per cell.
Rather than using shallow groove isolation or shallow trench isolation structures in the AG-AND cell to prevent inter-cell interference, Hitachi employed assist gates. When no voltage is applied to an assist gate, the gate shut off current and isolates adjacent floating gates.
Assist gates occupy less space than conventional groove type isolation structures, and like floating gates, they are polysilicon. "Poly silicon gates are closely arrayed on the silicon substrate. Such a structure is new to commercial products," said Katsutaka Kimura, department manager of the ULSI research department at Hitachi's Central Research Laboratory. "But we don't think that the new structure will cause trouble in volume production."
The assist gate creates a cell size in a 0.13-micron process that is less than half the size of a cell created with a shallow groove isolation structure in a 0.18-micron process, Hitachi said.
Speed reading course
To quicken the write speed of the multilevel cell, Hitachi changed the writing method from the conventional Fowler-Nordheim tunneling of electrons to hot electron injection, widely employed in NOR-type flash memory.
A unique feature of Hitachi's hot electron injection approach is that electrons are injected from the source side, not from drain side like in NOR memory. The writing time to one cell, normally about 10-4 seconds in a Fowler-Nordheim tunneling cell, is reduced to 10-5 seconds in the AG-AND cell, said Totsuka.
To further speed up the write time, the commercial flash chip with the AG-AND cell will have a four-bank configuration. The write speed in a chip with a one-bank configuration is about 3 Mbytes/s, but the write speed on a four-bank chip reaches 10 Mbytes/s.
With such a write speed, a standard music CD with its content compressed to about 64 Mbytes can be downloaded to an AG-AND flash card in approximately 6 seconds, Totsuka said.
An AG-AND flash memory recording system would also support the 20-Mbit/s data rate required by a digital HDTV system, the company said.
Hitachi engineers have verified the estimated performance of a 1-Gbit device with the AG-AND cell with an 8-Mbit prototype. "The technology has been completed. Volume production technology will be ready within one year," Totsuka said.
Hitachi intends to begin sampling 1-Gbit flash chips in the third quarter of next year, and to begin volume production in the fourth quarter.
