After Broadcom acquired SiByte last December, SiByte released a dual-core network processor: the BCM1250. The BCM1125 and BCM1125H devices being released this week use the same architecture but only one of the SB-1 cores that populate the '1250.

By reusing the core, Broadcom hopes the smaller BCM1125 chips can reach manufacturing quickly. The 800-MHz BCM1250 now sampling is to begin volume shipments in January; the BCM1125 is due to begin sampling in the second quarter of 2002 and should be ready for volume by the start of the third quarter, said Dirk Pawlowski, product line manager for Broadcom (Irvine, Calif.).

SiByte produced the BCM1250 first in hopes of finding some differentiation at a time when network processor startups were sprouting continually — hence the dual cores and the integration of items such as Ethernet media-access controllers (MACs). The BCM1125 chips target lower-end applications, such as line cards or Gigabit Ethernet switches. But Broadcom officials said that the BCM1125 will reach clock speeds of 1 GHz, just like its predecessor.

The BCM1125H is the same as the BCM1125 but with support for HyperTransport added. The BCM1250, likewise, supports HyperTransport, which is vying with RapidIO as a successor to the PCI bus for chip-to-chip interconnect.

"From a software perspective, the HyperTransport bridge chip looked like the PCI bridge chip. HyperTransport ordering rules looked like PCI," said Anu Sundaresan, Broadcom senior product line marketing manager. "Plus, to be honest, we saw the momentum around HyperTransport. There are no devices with native 'Rio' [RapidIO] support."

SiByte emerged in mid-2000 with an eye toward the communications market. But, because the BCM1250 uses 64-bit MIPS cores, the part has drawn interest in computation-heavy applications such as imaging, Pawlowski said. In addition, early observers saw the part as a natural for control plane processing. The control plane includes more typical CPU functions and is often handled by a general-purpose processor, while the data plane consists of data-forwarding tasks that often require a specialized processor.

The BCM1250 has seen a nearly 50-50 split between control- and data-plane design wins, Pawlowski said. Broadcom similarly hopes to find places for the BCM1125 chips in the control and data planes.

Like the BCM1250, the new devices integrate 256k of Level 2 cache, two Gigabit Ethernet MACs that can be converted to 8-bit FIFOs, and a memory controller with 25-Gbit/second peak bandwidth. Internal communications is handled by the proprietary 256-bit ZBbus. For external memory, the chips can use SDRAM, SGRAM or fast cycle RAM.

Broadcom is making the SiByte chips using the 0.13-micron process at Taiwan Semiconductor Manufacturing Co. Ltd.