SAN MATEO, Calif. - Cadence Design Systems Inc. is stepping up its adoption of industry-standard languages. The company will announce this week that it is adding assertion-based verification technology supporting the Sugar 2.0 Accellera-standard language to its Verification Cockpit tool, and that its simulation tools now support the SystemC language.
Cadence will also announce that it is donating its Testbuilder class libraries to the Open SystemC Initiative to encourage testbench reuse.
Mike O'Reilly, marketing vice president at Cadence, said the two moves demonstrate the San Jose, Calif. company's commitment to participating in and adopting industry standards and open interfaces to improve user verification productivity.
"Today users have to write massive testbenches to shake out easy bugs," said O'Reilly. "Using assertions allows users to shake out bugs early in the process, so verification engineers can focus on corner-case bugs-the areas where they think they are really going to have problems with a design."
O'Reilly said that assertion-based technology has thus far been slow to catch on, but that it will become a critical element as designs-and, thus, functional verification-become more complex. "The best way to get people to use assertions is to first get people to use it in dynamic simulations," he said.
To this end, Cadence has folded into its Verification Cockpit a package that adds advanced features to its NC-Sim simulation offerings, along with support for Sugar 2.0 and static-checking capabilities. The new assertion capability lets users capture specifications, requirements and assumptions as assertions, then verify the assertions statically using the tool's new static-check capabilities.
"It is done in an industry-standard language, which means you can exchange IP [intellectual property] among IP vendors and their customers," said O'Reilly. "And there will be a whole suite of tools from Cadence and others to support use of assertions."
The assertion tools and other tools in the Verification Cockpit run on a single debug environment.
Support for SystemC
Cadence is also poised to announce full support for SystemC. "We are seeing many of our big customers all around the world trying to develop next-generation designs starting with SystemC as the baseline," said O'Reilly, generating reference models at the C++ level with SystemC for use throughout the design process.
To foster use of SystemC in the flow, Cadence has added SystemC to its simulation offerings. "We are taking the SystemC reference simulator and expanding it so we can get much performance out of it and then, over time, natively incorporate it into our NC family of simulation products," said O'Reilly.
O'Reilly said Cadence has also opened up the class library of its TestBuilder open-source testbench development environment so that it now fits within the SystemC environment.
"And we've proposed donating the class library to OSCI," he said, noting that with the help of the Open SystemC Initiative, Cadence plans to modify the library so that it is SystemC compliant.
Cadence plans to release the assertion-based verification capability for Verification Cockpit in the fall and will charge current customers a $25,000 upgrade fee. Users will also pay a fee if they want to upgrade their simulators to run SystemC. Available in the fall, tools supporting SystemC will begin at $15,000.