Speaking at an X Initiative panel at the Design Automation Conference Tuesday (June 11), Marco Montalti, director of design methodologies at ST Microelectronics, said there are still a lot of tests that have to be done at both the design and manufacturing level. "But we should be able to consider diagonal routing becoming mainstream starting 2004," he said.

In common with other speakers at the panel, including professor Jan Rabaey of the University of California, Berkeley, a major attraction of diagonal routing is that it could lead to a reduction in both total wire length and the number of vias.

"Fifty per cent of the power in most chips goes into the wires. It can be 80 or 90 percent," said Rabaey.

Montalti said the reduction in total wire length could lead to smaller dice. "Smaller area with a reduction in vias and wire length may lead to improved yield," he said. "But we have to deal with new place-and-route technologies, and parasitic extraction is another issue. For manufacturing, mask database size doesn't seem to be an issue but it has to be investigated carefully and we have to look at compatibility with existing equipment."

ST has produced designs using diagonal routing but has yet to go to silicon. The company implemented a CAD simulation of one design aimed at a 0.13-micron process which saw an overall die shrink of 20 percent, based on 24 percent less wiring than a comparitive Manhattan-routed design. Just over a third of the vias were removed.

Chris Rowen, president and chief executive officer of processor-core designer Tensilica, said "we haven't seen any large-scale designs carried through the process. Excellent progress has been made on the back-end issue, but we need to do more apples-to-apples comparisons. We all need to see IC yield data to confirm what we intuitively know is true."

Aki Fujimura, chief operating officer of Simplex Solutions, which kicked off the X Initiative, predicted that the first X architecture designs will be at 0.13 microns and some will be at 0.18 microns. "Designers will do at least one design based on X at 90 nanometers, then everybody will move to do it at 70 nanometers," he said.

Joe Hutt, vice-president of engineering for Magma Design Automation, said routing software has always lagged the ability of fabs to implement the necessary on-chip wiring and that there is still scope for improvement in Manhattan routing.

"Technology in terms of routing development has never caught up to the processes," said Hutt. "As we improve our understanding, we can get improvements in a reasonably aggressive way."