Synospys intends to combine Co-Design's technology, principally the design and verification language called Superlog, with Synopsys' own Verilog simulator. It remains to be seen whether a larger and more significant future will be found for Superlog within Synopsys which has itself driven an alternative high-level language standard called SystemC.

It also remains to be seen whether language experts such as Peter Flake, Co-Design's chief technology officer, Phil Moorby, its chief scientific officer, and Simon Davidmann, chief executive officer will stay for a long time at Synopsys. The history of EDA is full of examples of acquisitions where the entrepreneurial spirit soon compelled those executives being acquired to move on.

There had been rumors of an imminent sale of Los Altos, Calif.-headquartered Co-Design for a few weeks (see July 19 story). These rumors strengthened when Co-Design and CoWare Inc. declared a truce in a long-running rivalry between the proponents of Superlog ranged behind Co-Design and the supporters of the SystemC language who have lined up behind CoWare and Synopsys. Executives from Co-Design and CoWare co-authored an article proclaiming that both languages had a key role to play in electronics design (see August 20 story).

Although Co-Design, founded in 1997, is registered in the U.S. it's engineering base is largely in the U.K. and Davidmann has split his time evenly between the U.S. and Europe throughout the company's existence.

It is from the Oxford, England base that Co-Design developed the Superlog language, which extends the standard Verilog hardware description language with additional C-like programming techniques and advanced verification and behavioral modeling capabilities.

Synopsys recognizes Superlog

For several years Synopsys has ignored Superlog apparently content that its own approach, based on the use of C++ language and specialized libraries, would succeed by dint of technical utility and Synopsys's market leadership. Synopsys has now recognized the usefulness of Superlog.

"Co-Design Automation assembled many of the world's leading Verilog language experts to deliver Superlog technology," stated Aart de Geus, chairman and chief executive officer of Synopsys, in a statement.

"The addition of Co-Design Automation to Synopsys comes at the very moment that SystemVerilog, the next-generation Verilog language, is coming about. Having technology pioneers such as Phil Moorby, Peter Flake and Simon Davidmann join our team of verification experts significantly accelerates our Smart Verification strategy. The combination of Synopsys' recent VCS 7.0 release, SUPERLOG technology and the Accellera SystemVerilog umbrella will drive the state-of-the-art of RTL design and verification forward in very short order and decisively impact design productivity."

Thinking at Intel Corp. and ARM Holdings plc, both supporters of Superlog-based design methods, is likely to have influenced the climate in which the acquisition has come about.

"We believe that both Intel and the industry will be better served by a higher abstraction language, and we have worked closely with Synopsys and Co-Design Automation to evolve such a verification standard," said Sunil Shenoy, director of design engineering at Intel, in a statement.

"Combining these technologies is great news for us and our partners who incorporate our cores into their designs." said Simon Segars, vice president of engineering at ARM, in the same statement.