San Francisco - TriCN, which specializes in high-speed I/O interface intellectual property, bases its double-data-rate fast-cycle RAM interface solution on SSTL-2 input/output. The DDR FCRAM interface is manufactured on Taiwan Semiconductor Manufacturing Co.'s 0.18- and 0.15-micron processes, and variations of its 0.13-micron processes, including the 1-volt core supply (low-voltage) process.
CEO and CTO Ron Nikel said TriCN delivers I/O that is optimized for a specific interface. Its DDR FCRAM offering consists of SSTL-2 I/O pads with dedicated I/O drivers for data, clock and address. Maximum operational frequency varies from 600 to 666 Mbits/ second per I/O, depending on geometry and process. An internal VREF generator is provided for test applications.
Nikel said the offering has been qualified for timing completeness and signal integrity quality over a range of printed-circuit board impedance and route lengths, as well as terminator tolerance and topology for given operational frequencies and memory sizes.
It is priced below $85,000 depending on memory devices, packaging, connectors, pc boards and vias. Additional product information is available at www.tricn.com/products/DDR-FCRAM.html.
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