NAPERVILLE, Ill.--Fabless chip maker Tachyon Semiconductor Corp. here claims to have achieved a breakthrough with the creation of a three-dimensional (3D) chip structure built with four silicon wafers.
Tachyon believes it to be the very first multi-wafer stack ever. Previous wafer-stacking announcements by Tachyon and others have described the bonding of only two silicon wafers, according to the Naperville-based company.
Wafer stacking is of great interest to semiconductor manufacturers. The technology promises lower power consumption and higher optimization over traditional two-dimensional chips.
Tachyon's 3D stacking process uses copper-to-copper thermal diffusion to bond standard silicon wafers without introducing any adhesives or dielectric materials.
After the first two wafers are bonded, the top wafer is thinned to five microns. Additional wafers are bonded and thinned in turn. The extreme thinning facilitates through-wafer electrical connections and heat dissipation; it also ensures that future multi-layer devices will fit into standard packaging.
"Variable bonding surfaces were also incorporated in order to investigate several engineering issues, and voids were deliberately introduced to test a non-destructive void detection and calibration technique," according to the company. "The results of the tests amply confirmed the viability of their stacking process and demonstrated the potential to incorporate virtually any number of layers."
