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Lower growth requires new skills for IC industry








EE Times


MONTEREY, Calif. — Two influential company presidents, speaking in separate sessions at the Global Press Summit here Tuesday, painted a new and unfamiliar picture of the electronics industry. Christine King, president and CEO of AMI Semiconductor (Pocatello, Idaho) and Edward Ross, president of TSMC North America (San Jose, Calif.) addressed a gathering of international technology reporters here with the news that things have changed.

King warned semiconductor managers against a strategy of waiting for the industry to "come back." She said the old industry of economic bubbles and killer applications was not going to come back, at least in any predictable way.

"We don't see any killer apps on the horizon," she said. "Instead, we are learning to take advantage of opportunities to serve our customers in smaller ways - maybe you could call them manslaughter apps."

King described her goals for AMI as a company streamlined almost ruthlessly around a small number of core competencies - mostly relating to mixed-signal and FPGA conversion experience and an all-important quality: agility.

"We have to be flexible enough to handle make money on products ranging from a few cents each - like RFID tags - to $10,000 each -- like some military projects," King said.

In the following keynote address, TSMC president Ross outlined a very similar view of the industry from an entirely different point of view -- as the head of a giant, industry-dominating powerhouse.

"We see significantly slower growth for the semiconductor industry in the future, on the order of 7 to 10 percent," Ross said. "This will be due to a combination of factors: a slower global economy, saturation in the electronics content of new products, severe price erosion, dropping return on investment in the industry and the absence of any killer applications for the foreseeable future."

Ross theorized that part of the problem was that the industrial economy can only absorb new technology at a fixed rate, and that progress in microelectronics had exceeded that rate.

"In the '70s and '80s, we were rolling out a new process node every three years," he said, "and the economy quickly absorbed those advances and turned them into end-user products. In recent years we have accelerated that rate to a node every two years, and the rate of absorption has actually slowed. By this model, we may have advanced ASIC technology so fast that we are now four years ahead of the industry's ability to exploit it."

Ross offered the now-familiar picture of an industry in which the crushing cost of a production fab -- he cited $3 billion for a 300 mm fab at 90 nm, with 30K wafers/month capacity -- forces all but a handful of foundries and an obvious couple of semiconductor manufacturers out of the business. This leads to further, even more radical disintegration of the supply chain.

But Ross offered another observation that is far less familiar. He suggested what he labeled the "Good Enough" factor: a breakdown in the traditional lock-step march to each new process node. Ross said that the increasing cost and risk of design at 130 nm and beyond would, perhaps for the first time, cause chip designers to find their optimum process somewhere other than at the leading edge. "Today about a third of our business is at 0.13 micron," Ross said.

"Nearly half of it is still at 0.18. A rough generalization would be that the customers who chose to move to 0.13 did so primarily for performance reasons, while those who stayed at 0.18 often did so to ease design of analog content on the chip."











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