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Puma targets low-power, 10-Gbit links








EE Times


COLORADO SPRINGS, Colo. — Physical-layer IC startup Aeluros Inc. is sampling an all-CMOS low-power Xaui- to-XFI bridge chip with an integrated transponder. Aimed squarely at optical line cards, the Puma chip follows the company's recent seeding of the 10-Gbit market with a mixed-signal test device called Bobcat.

The company is aiming for designs currently served by Marvell Semiconductor Inc. and Broadcom Corp., betting that Puma's 800-milliwatt power will make it the only chip with dissipation well under 1 watt.

Founded in 2001, Aeluros is concentrating initially on line-side interconnect, with a heavy focus on Optical Internetworking Forum and 10-Gbit Ethernet standards. Backplane interconnect is a secondary focus, particularly as backplanes scale to 10 Gbits per second. The company has ruled out participation in chip-to-chip and processor-to-memory interconnect, seeing board-level I/O as more critical.

Aeluros (San Jose, Calif.) said it will work solely with standard CMOS processes. Chief executive officer Richard Egan said that some physical-layer competitors may create gallium-arsenide parts, but Aeluros expects to go head-to-head with other CMOS-centered semiconductor players such as Broadcom, Intel, Infineon and Marvell.

The company began its system-level modeling efforts with Lynx, an early proof-of-concept device. Last summer, Aeluros introduced a serializer/deserializer (serdes) "torture test" device called Bobcat, which could be tested in either a four-channel 10-Gbit mode or single-channel 40-Gbit mode.

While it proved the ability to implement serdes designs in CMOS, Aeluros employed Bobcat more as a means of showing that high-density 10-Gbit switches could be designed without heat spreaders on individual physical-layer chips, than as a means of bringing Bobcat to market.

At the time, Aeluros promised a tapeout of its Puma bridge chip by the end of 2002. The company met that goal, and will move into general sampling of the part at the end of this month.

Puma can be used in two ways, the company said. If designers are using larger form factors such as Xenpak, X2 or Xpak modules, the Puma chip will reside directly within the module.

If newer, small XFP modules are employed, Puma resides on the line card, bridging between the XFP module and a framer or media-access control chip with a Xaui interface.

"Right now, the Xenpak designs might dominate, but we see a migration to XFP happening for equipment vendors who want the maximum density in 10-Gbit switches," said product-marketing manager Grant Smith.

For system interfaces, Puma supports either 10-Gbit Ethernet or 10-Gbit Fibre Channel rates.

Puma, in a 13 x 13-mm package, will be priced at $150 in high volume.











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