The Swedish Socware Transceiver Demonstrator Project, or SoCTRix, is charging ahead with plans for taping out next month a modified phase-locked loop for use in the multistandard transceiver the coalition is developing. The group has also added two more industrial partners: Cadence Design Systems Inc. and Jazz Semiconductor.
During the past three months, system-side design has focused on finalizing the 802.11a/b/g modes. SoCTRix has completed a study to find the optimum front-end architecture (low-noise amplifier, quadrature downconverter and frequency synthesizer) with respect to performance, area and power consumption. Further work has verified that the analog and digital baseband filters perform acceptably on error-vector magnitude and bit-error rate. As a result of this investigation, the group has decided to tune the analog filters to allow lowering of the order of the filters. The transceiver will use digital correction of the I/Q balance and dc-offset cancellation in both receive and transmit paths. The development of those algorithms has now started.
More measurements on RF/analog circuits from previous tapeouts have been performed. For example, SoCTRix has completed phase-noise measurement tests on an oscillator-which will constitute the core of the VCO-and the results are in parity with simulated values.
The group has also studied the feasibility of using silicon germanium to design power amplifiers for orthogonal frequency-division multiplexed (OFDM) systems at 5 to 6 GHz. The results seem promising and design work targeting Jazz Semiconductor's SiGe technology has started.
The first measurements of the printed balanced antennas have been carried out. Here again the results are promising, but the isolation between the wideband code-division multiple-access Rx and Tx antennas needs to be improved slightly to meet system requirements.
Discussions have been initiated with the Industrial Technology Research Institute (ITRI) of Taiwan, a project member, and with ERSO regarding both system-on-package design (passive elements, like filters) and processing. The primary target is ITRI's technology for integration of passives in organic substrates.
The algorithm development for the OFDM (802.11a/g) receive and transmit data paths-for example, channel estimation-has advanced well and is being carried out in cooperation with the industrial partner BitSim. That Swedish company has focused on a Viterbi decoder, demapper and deinterleaver. On the transmitter side, the power control and peak clipping functionality have been implemented. In the near term, work has to be done on development and implementation of the algorithms for I/Q correction and dc-offset cancellation.
 |
|
Exploration continues with further work on a system-on-chip design for the 802.11a/b/g wireless markets.
|
In the last few months, SoCTRix has also forged a good relationship with the wireless-LAN development group at Agilent EEsof as the use of the company's ADS simulation environment has intensified.
Mixed-signal design
Meanwhile, mixed-signal development has progressed with system work for the multistandard analog-to-digital converter. Measurements on the first silicon for the 80-Msample/second 10-bit converter will start in a couple of weeks and provide valuable feedback. On the marketing side, SoCTRix continued its activities both at the DATE 2003 exhibition in Munich, Germany, and with company visits in Taiwan.
Besides Agilent EEsof, BitSim, Cadence, ITRI and Jazz, other SoCTRix partners include ARC International, Catena, Chartered Semiconductor, Samsung Electronics, Via Technologies, the Swedish Defense Research Agency and the Norwegian University of Science and Technology, together with the four Socware universities. Since the project is now almost completely financed, it will be closed to new industrial partners after the middle of this year.
