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Tezzaron prototypes pseudostatic memory








EE Times


San Mateo, Calif. - Tezzaron Semiconductor Inc. last week announced an advanced pseudostatic memory technology that's intended to provide an alternative to SRAM or DRAM in both discrete memory chips and embedded system-on-chip applications. The company plans to implement the pseudostatic RAM, dubbed PSiRAM, in 130- and 90-nanometer processes, and license PSiRAM technology for use in SoC designs.

Tezzaron (Naperville, Ill.) said the technology will enable one of the world's fastest memory devices. A PSiRAM prototype fabricated in 90-nm CMOS features 1.3-nanosecond latencies, 1-ns cycle times and 400-MHz performance in a 2-Mbit x 16 quad-data-rate configuration.

Tezzaron offers systems builders such technologies as three-dimensional wafer stacking, ferroelectric process technology, built-in self-test tools, microcontroller intellectual property and design services.

The PSiRAM prototype, built in a 90-nm process, features memory cells measuring only 0.59 micron2 each. Tezzaron said. The underlying technology is a patented three-transistor cell that senses changes in electrical current rather than measuring electrical voltage, according to Tezzaron.

The decision to sense current change rather than voltage not only reduces the read delay, it eliminates the turnaround time on read-modify-write cycles, the company said, vastly improving throughput on some types of operations.

Tezzaron plans full production of PSiRAM chips next year. A 130-nm version is slated for the first half of 2004.

Mark LaPedus is editor of Silicon Strategies, an EE Times Network Web site.

http://www.eet.com











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