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Tetherless world looks to single technology








EE Times


This is the most innovative time ever in radio technology. From cordless phones to wireless LANs and 3G cellular, from ultrawideband to software-defined radio, ubiquitous wireless connectivity is changing business and life.

This drive toward connectivity is reflected in the integration of multiple radios, such as Bluetooth, GSM and Wi-Fi, into concept devices such as Texas Instruments' Wanda PDA. TI is also staying fast to its prediction of a single-chip GSM radio by the end of 2004, with others, such as Motorola, predicting similar announcements shortly thereafter. Meanwhile, 2.5G technologies are proliferating while EDGE looks to secure its place as the wide-area wireless technology for some time to come. 3G remains a distant hopeful across the board.

Embedded Wi-Fi with single-chip implementations is also emerging, led by Broadcom Corp.'s recent announcement of a single-chip 802.11b, while ultrawideband (UWB) looks to become the short-range communications technology of choice four years hence. The rapid developments have accelerated the normally plodding, obscure and esoteric IEEE standards processes and catapulted to the fore as investors and designers alike try to anticipate its every move, especially with respect to its WLAN, UWB and fixed-wireless efforts.

So, where will this innovation bring us with respect to semiconductors? While it might truthfully be said that the future of wireless semiconductors and the road to connectivity utopia lies in all-CMOS radios with agile-RF front ends and software-defined radio (SDR) basebands with new processing architectures, that's oversimplifying a rather complex situation. It's more accurate to say that the future of wireless semiconductors lies in continued optimization of processes, tools, devices, components, architectures, software and overall systems to meet the power, cost, performance, size, processing and time-to-market requirements of next-generation wireless devices. Or, to put it another way, wireless is where the rubber meets the road when it comes to electronic design.

Add the integration of applications, such as video streaming, MP3 audio, digital cameras, color displays and 3-D graphics acceleration, and engineers quickly learn to stretch the limits of their design and process capabilities.

To stay competitive and meet these crunching demands, designers are exploring techniques such as body biasing for transistor leakage reduction, digital RF architectures using sampled-data converters with switched-capacitor filters, cutting-edge peak-to-average power-ratio (PAPR) reduction techniques for high-efficiency amplifiers, and advanced power management using dynamic frequency and power scaling and intelligent circuit on/off switching. From the system side, the partitioning of functions between hardware blocks as well as between hardware and software has become a crucial area of research. Meanwhile, the debate rages over whether CMOS or some III-V variant- or a combination of the two-is the best way forward for low cost and high integration. That debate has reached screaming pitch of late with the entry of pro-CMOS behemoth Intel into the wireless arena alongside Texas Instruments, Motorola, Philips, STMicroelectronics, Analog Devices and Silicon Labs. With 90-nm CMOS processes, both Intel and TI have the integration capability that they believe will enable the low-cost, low-power processing needed for competitive all-CMOS radios.

Power reduction
Though the looming semiconductor advances are myriad and wide-ranging, almost all must involve power reduction at some level, thanks to the excruciating power limitations of mobile devices. The move to 90-nm processes for baseband and applications processing has helped reduce the power consumption in many respects. However, the fine line width has also raised the level of transistor leakage, which must be addressed if the advantages of finer processes are to be realized.

"We're dealing with physics here," said Bill Krenik, wireless advanced architectures manager at TI. "If we simply choke the devices off and adjust the process so that the leakages are at the same levels as past technologies, we'd get effectively no increase in transistor speed as we move to finer processes."

Instead, Krenik, his team and others in the industry are exploring a technique called body biasing (or N-well biasing), which modulates the substrate conductivity of the MOS gate channel using an external voltage. By moving the voltage around-above Vdd for PFET and below ground for NFET-leakage can be cut.

"That's been proposed in numerous papers and articles," said Krenik, "and it implies a bank of varying voltages, so there's some overhead, but not much power loss." According to Krenik, the leakage is so high in submicron processes that the overhead required to implement the techniques pays for itself. "This is not a "nice to have," said Krenik, "this is something we really have to do."

But beyond 90 nm, Ken Hansen, vice president and director of Motorola's wireless and mobile systems and advanced technologies division, is skeptical of body-biasing's value. "At 90 nm, we'll be able to tolerate the leakage using combinations of N-Well bias to turn the transistors off-but the number of transistors on a chip will double at 65 nm." So, while biasing will still work to some degree, Hansen believes the only way forward is silicon-on-insulator (SOI) if device voltages are to be lowered while reducing leakage. Despite the cost of SOI, as well as the recharacterization of devices and the more complications involved, Hansen believes that SOI will "be a reasonably pervasive technology [at 65 nm]."

From the RF side, the mass migration from superheterodyne to zero- or low-IF architectures over the last four or five years has almost been complete, except for CDMA radios. The next step, according to Krenik, is the reduction of cost, power and board area through the use of a digital RF front end based on a sampled data converter with switched-capacitor filtering. The goal is to directly digitize the RF signal to eliminate the analog and mixed-signal circuitry typically required between the RF and baseband. This, said Krenik, takes advantage of the high switching speeds and low parasitics of leading-edge CMOS processes.

Sampled data architectures are based on the fact that the very act of sampling an input performs a heterodyning function (converts to baseband), "so the frequency translation is inherent in the sampling operation," said Krenik. "Also, because the system samples and resamples, it builds up signal strength, so there's an implicit gain function." Finally, said Krenik, because the converter is sampling on capacitors, a switched-capacitor filtering operation can be performed to get selectivity. "So, it turns out that a very small, compact piece of circuitry gives us those three things [frequency translation, amplification and selectivity]."

Motorola's Hansen is particularly excited about this approach. "[I'm] dying for the sampled data system. That's fundamental to breaking the code [of higher integration]. We don't know how to do it yet, but everyone's working on it." While TI has already implemented the technique in its BRF6100 Bluetooth radio and is working on doing it for GSM, Doug Grant, director of marketing at Analog Devices Inc., sees lots of bumps ahead, particularly with respect to dynamic range and the errors associated with sampling timing with high-frequency signals.

No talk of power could leave out a discussion of power amplifiers, pound for pound the most power-hungry component of any wireless system. For multicarrier systems such as those based on orthogonal frequency division multiplexing (OFDM), this is particularly true due to the high PAPR, which requires a backing off of the average power, thereby limiting PA efficiency. Overcoming the PAPR inefficiency is the goal of IceFyre Semiconductor (Ottawa, Ontario, Canada). Thanks to novel pre- and post-PA signal processing, it has allowed the use of switch-mode PAs in multicarrier systems that achieve a 25 to 30 percent improvement in efficiency over the typical linear PA. "Every big company is trying to do this, as if you can do it, you've hit paydirt," said Dan Mathers, president of IceFyre. "Only IceFyre has solved this and proven it in silicon."

While analog and RF designers struggle to wrestle every penny and every dB out of their front ends, the fact of the matter is that they're sliding rapidly down a curve of diminishing returns. A combination of overall system partitioning and software is what makes the difference-and is what separates those vendors supplying "best of breed" components versus those supplying system solutions. "One of the single biggest factors in current drain is software written for hardware," said Motorola's Hansen. "By optimizing the software, you can reduce power by 50 percent. We've demonstrated that." After that, he said, the next biggest improvement is higher integration. "Get rid of the high-speed interfaces between the baseband and memory," he said, pushing for stacked memory architectures with reduced drive capacitance.

Move converters out
To facilitate integration, there is industry-wide interest in a digital I/F interface that would push the analog-to-digital and digital-to-analog converters out to the RF front-end module. This would allow the baseband to more quickly jump to finer CMOS geometries without worrying substrate noise. "This is a very important trend," said Ed Healy, vice president and general manager of Silicon Labs' wireless business.

However, with the move to single-chip CMOS radios, substrate noise becomes a major hurdle, especially with unpredictable digital noise signatures due to the many possible applications that may be running on a device at any given moment. This has pushed companies such as SkyWorks to advocate the use of multichip modules. For other companies, such as Philips Semiconductor, a platform-based design with the choice of process optimized for the function, versus all-CMOS, is the way to go.

Regardless of the partitioning and the process uses, the RF section of a radio-once the most crucial component of any wireless device-is becoming almost commoditized as the emphasis and cost calculations shift up the signal chain from the RF and baseband to the applications and media processors.

"That is the future of wireless," said Mario Rivas, vice president of communications at Philips. "The RF will become a smaller and smaller part of the overall pie. While it will still be important, the other modules will become increasingly important and add business."











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