San Jose, Calif. - Sun Microsystems Inc. said it will more than triple the performance of its UltraSparc processors when it shifts them to a more advanced manufacturing process developed by partner Texas Instruments Inc.

Based on 90-nanometer design rules, the process technology is tailored for high-performance microprocessors and includes features not present in TI's current 90-nm process for baseband chips used in cellular phones.

Much of the technology is intended to maximize transistor switching speed. Some notable features include the use of strained silicon, to boost electron mobility; ultrashallow junctions, to reduce capacitance; and gates tipped with nickel silicide, to lower resistance.

The TI process' metal layers also incorporate organosilicate glass, a dielectric material with a dielectric constant of 2.9 from Novellus Systems Inc. The insulator is intended to reduce capacitance and propagation delays within an interconnect.

TI claims some features of the process are more advanced than any chip-making technology announced thus far. For example, it includes transistor gates just 37 nm in length and SRAM cells that cover 0.97 square micron each.

TI has no immediate plans to use the process to manufacture its own digital signal processors, though eventually it will. "In the case of TI, it will be heavily leveraged at the 65-nanometer node, where it will be used for high-performance DSPs," said Peter Rickert, a TI fellow and the company's director of process technology development.

Multiple-thread count

Sun said it will make use of 90-nm design rules starting next year with its UltraSparc 3i device, which is used in four-way servers. Currently the 3i is manufactured using 0.13-micron design rules.

The UltraSparc 4, for mid- to high-end servers, will also be initially manufactured on 0.13-micron design rules. That next-generation two-threaded processor sports two UltraSparc 3 cores, on-chip tags and an arbitration scheme that lets the threads share the Level-2 cache. Sun said that the processor will be integrated into systems by the first half of next year.

The use of multiple threads should boost overall performance by at least 60 percent, even though the first UltraSparc 4 devices will operate at 1.2 GHz, which is the same operating frequency as the UltraSparc 3.

"You can pull one instruction out of each thread and make full use of all the execution resources," said Harlan McGhan, strategic marketing manager at Sun. "Second, we do thread-level parallelism by stacking up four threads, assuming three out of four threads will be stalled waiting for memory accesses."

Sun said it plans to continue working with TI on process technology as it develops processors that can handle more threads.

"The big upturn is going to come in 2005 and 2007 when we move to generation-three designs that are far more radical at the 65-nanometer node. Relative to today's machines, they will be 30 times what we're currently doing," McGhan said.

Sun and TI have had a manufacturing arrangement for the last 15 years. The partnership has brought Sun access to TI's leading-edge production capacity and has given TI a way to amortize capital expenditures.