While Altera's new Quartus release provides several improvements, what takes center stage is version 4's support for Stratix II, which is also slated to roll this week. The Stratix II devices depart from conventional, four-input lookup tables, allowing LUTs with up to seven inputs, configured in adaptive logic modules (ALMs).

That architectural shift required extensive under-the-hood changes to the Quartus tools, said Misha Burich, senior vice president of software development at Altera. "Every component of the Quartus flow had to change-synthesis, placement, routing. With all this flexibility, the burden is back on the synthesis tools."

Burich said that the synthesis technology mapper in Quartus version 4.0 understands the new LUTs and knows how to pack them into ALMs for best performance and area efficiency. This knowledge has also been shared with Synplicity and Mentor Graphics Corp., whose FPGA synthesis tools will support Stratix II, he said.

Meanwhile, Quartus version 4.0 adds a buffer insertion feature for Altera's Hard Copy structured ASICs to yield more accurate delay estimation and higher maximum frequencies, the company said. The new tool set adds an RTL Viewer that gives users a hierarchical view of the design.

An auto-fit feature, which lets users tell a compiler how hard it needs to work, can reduce compile times by as much as 50 percent for all device families, Altera said. The SignalTap II embedded logic analyzer adds new triggering modes, and a memory compiler waveform feature generates waveforms for documentation.

Quartus II version 4.0 is available now and is shipping to all customers with software subscriptions. The annual subscription for Altera design software is $2,000 for a node-locked PC license.

Meanwhile, Actel's Libero 5.2 Integrated Development Environment (IDE) is said to offer faster timing closure and as much as 20 percent performance boosts for Actel's flash-based ProASIC Plus FPGAs when used with Magma Design Automation's Palace physical synthesis software.

Another added feature is Actel's ChainBuilder software, which enables programming or testing of ProASIC Plus FPGAs when they're included in a daisy chain of devices for programming or test.

The Actel Libero v5.2 IDE is available now in four editions starting at $595 for a one-year license.