The group will provide information about Structured ASIC technology on its Web site.

As defined by the group, structured ASICs are targeted at designers who need the fast-turn capabilities of FPGAs without their high unit cost. Also targeted are designers who want to take advantage of the relatively low unit costs of ASICs without paying high non-recurring engineering (NRE) fees.

Structured ASICs reduce much of the upfront NRE and shorten development time by using prediffused base metal layers to implement logic cells, memory and I/O common to many designs. Custom logic for a specific application is then implemented in the final few layers of metal, requiring far fewer mask layers for each design.

Structured ASICs can be fabricated in as little as three weeks, according to the new group. The association claims designers can build complex ASICs for 25 percent or less the development cost of a standard cell device, at a unit cost approximately 90 percent less than a complex FPGA.

Market resarch firm iSuppli recently forecast that structured ASIC revenue would reach $250 million by 2007.

The Structured ASIC Association is open to new members participatingin the structured ASIC market.

The four founding companies either provide structured ASICs or have design tools for implementing them.