The companies will supply engineering samples and jointly market Toshiba's 8-Mbit FRAM starting in March 2001. After developing the commercial 32-Mbit FRAM, they said their collaboration may be extended to 64-Mbit and 128-Mbit devices, depending on market conditions.

Although FRAMs have been hindered over the last decade by issues of reliability and process contamination, Infineon has had its own ferroelectric research program and recently invested $30 million in Ramtron International Inc. (Colorado Springs, Colorado), a pioneer of commercial non-volatile FRAM. The technology's backers say that FRAMs combine the simplicity and endurance of DRAM, the fast read and write times of SRAM, and the non-volatility of flash that lets the parts retain data without power. Infineon and Toshiba said they expect their 32-Mbit FRAM to replace the multichip package unit currently used in mobile phones and consisting of a battery-backed SRAM and a NOR flash memory in a stacked configuration.

Infineon (Munich, Germany), an established DRAM supplier, is backing two horses, FRAM and magnetic RAM, in the race to create a next-generation ideal memory.

With Toshiba, a previous but not present collaborator on DRAM technology, Infineon will focus on the FRAM's memory cell structure, boosting read and write cycles, raising access speeds, enhancing reliability and establishing a method for resolving metal contamination of silicon during chip production.

FRAM's low power consumption and immense number of non-volatile read and write cycles makes the technology suitable for game consoles, cellular phones, smartcards, and mobile products, the companies said.

Toshiba holds a license to the Provskite lead zirconate titanate (PZT) FRAM process technology of Ramtron, and Infineon holds a cross-license agreement with Ramtron that provides it with non-exclusive license to Ramtron's FRAM memory technology. Thus, the Infineon and Toshiba will work on PZT-based FRAM.

Toshiba's 8-Mbit FRAM features a so-called "chained" cell structure, in which ferroelectronic capacitors and transistors are connected in parallel. Toshiba had announced this chained structure at the International Solid-State Circuits Conference in 1999. The device features the compact 1T1C (1-transistor, 1-capacitor) cell structure found in DRAM.

The joint development program will start in early January 2001 at Toshiba's Advanced Microelectronics Center and Ofuna Office of Semiconductor System Engineering Center, both in Yokohama, Japan. Infineon will send about 20 engineers to the Toshiba facility for the joint project. The partners said they will share development costs.

Infineon and Toshiba plan to fabricate and sell their jointly-developed 32-Mbit FRAM respectively. But their memories will be pin-compatible and the companies will serve as second sources for each other.

Yasuo Morimoto, president and chief executive officer of Toshiba Corp.'s Semiconductor Co., said, "We expect to use well-established 0.25-micron process technology, and that will make FeRAM very competitive against SRAM and NOR flash in cellular phone applications. This is a case where we can create a new solution while minimizing our level of new investment."