MANHASSET, N.Y. — The race to define a post-PCI interconnect for communications systems will heat up Monday (Nov. 5) as two fabless design companies announce competing switch chips. API Networks Inc.'s four-port switch is designed for HyperTransport, while Tundra Semiconductor's six-port switch and supporting silicon target RapidIO.
Both companies hope to grab sockets in communications systems that need a fast standard interconnect beyond PCI. And both ultimately will face competition from 3GIO, a PCI replacement backed by Intel Corp. but not expected to see silicon until late 2003 or early 2004.
"People have laid their cards on the table in this war, and now it's a matter of who executes best," said Nathan Brookwood, market watcher with Insight64 (Saratoga, Calif.). "For the moment, this has become a battle between HyperTransport and RapidIO, and so far it is split along architectural lines, with the MIPS camp using HyperTransport and the PowerPC camp using RapidIO."
Camps coalesce
The MIPS-based SiByte processor now sampling from Broadcom Corp. uses HyperTransport, as will MIPS-derived processors coming from PMC-Sierra and Sandcraft. HyperTransport was developed by Advanced Micro Devices and API, and AMD will first use it in its X86-like Hammer processor, expected to ship by 2003. Separately, Broadcom and server maker SGI will join an ad hoc consortium backing HyperTransport.
Motorola Inc. recently announced it will ship a version of its PowerPC using the RapidIO interface. In addition, startup Red Switch said earlier this year it will deliver an eight-port RapidIO switch by the middle of next year. RapidIO is shepherded by its own large consortium of systems and silicon vendors.
API's AP4041 is a four-port HyperTransport switch that supports 2-, 4- and 8-bit ports running at up to 800 MHz and using double-data-rate memory to hit peak data rates of 12.8 Gbits/second per port. The part will be available in an FPGA form for prototype work in December. A finished chip will sample in spring and go into production in the summer, the company said. It will be made by Taiwan Semiconductor Manufacturing Co. in a 0.13-micron process, come in a 452-lead BGA package and cost $146 each in orders of 1,000.
The part will let users daisychain up to 31 HyperTransport devices on one system. It uses a split-transaction bus to support multiprocessing configurations.
Though API (Concord, Mass.) termed the device the first of a family of HyperTransport silicon, the company is not revealing many details about its road map. Support for 16-bit ports will reportedly come in late 2002. Versions with more or fewer ports are also likely on the drawing board.
API has about 15 design wins for the new switch and 30 for an existing HyperTransport-to-PCI bridge chip, general manager David Rich said, citing edge and access routers, virtual private networks and firewalls, and voice-over-Internet Protocol equipment. "In the control plane much of the existing infrastructure gear uses PCI or CompactPCI, but most customers want faster interconnects," he said.
For its part, Tundra's Tsi500 is a six-port RapidIO switch. Four of the ports are 8-bits wide and run at 500 MHz, using DDR to deliver peak data rates of 16 Gbits/s per port. The device also includes two 16-bit-wide ports.
Bridge chips
Tundra (Ottawa) is also announcing a RapidIO-to-PCI/PCI-X bridge chip, the Tsi400, and a bridge chip that connects the existing PowerPC processor bus to RapidIO, the Tsi890. The latter part also includes PCI/PCI-X ports, a DDR memory controller and dual Gigabit Ethernet ports. Pricing and availability will not be announced until January, but it is believed the parts will sample by June.
Tom Cox, strategic marketing manager for Tundra, suggested the API part must include unique extensions to HyperTransport, since that spec does not actually define a switch implementation. He said communications OEMs wanting speeds beyond PCI currently use proprietary interconnects developed in-house, but "people are trying to get to something that uses standards."
Intel Corp. already has garnered broad support for a next-generation interconnect called 3GIO, or Arapahoe. Meant as a PCI replacement, 3GIO is still being defined and silicon won't hit the market until late 2003 or early 2004, proponents say.
"I have little doubt 3GIO will ultimately dominate this space," said analyst Brookwood. But he said HyperTransport and RapidIO both have a chance to stake out the high end in communications systems as a mezzanine bus or interconnect.
