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Getting back to basics
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EE Times


Richard GoeringA recently released survey of more than 600 pc-board designers suggests that signal-integrity simulation is not catching on as fast as commercial activity in this area might suggest. The message from designers is loud and clear: Get back to basics, and give us more integrated tool sets.

The second annual PCB Market Study by pc-board CAD vendor Zuken-Redac and Printed Circuit Design magazine poses a challenge to Zuken-Redac and other vendors that have emphasized signal integrity out of a belief that high-speed boards are becoming a dominant concern.

An overwhelming majority of respondents, however, said they spend less than 10 percent of their design time on signal-integrity concerns. Forty-one percent said they typically give special consideration for signal integrity to less than 10 percent of the nets on their boards, while 36 percent said that 10 to 30 percent of nets raise signal-integrity concerns.

Asked at what clock frequency designers should do signal-integrity checking, 29 percent said never, 24 percent said under 50 MHz and 27 percent said 51 to 100 MHz. It thus appears that a slim majority of 51 percent are running signal-integrity checks under 100 MHz.

When asked what kinds of signal-integrity checks they do perform, the largest response was "rule of thumb" checks for crosstalk and impedance matching. A smaller number said they used simulation, and their largest issue was "delay rules."

Signal integrity did not make it into the "top five" list of important EDA software features: tight integration with schematic capture, overall pc-board package integration, any-angle routing, integration with mechanical design systems and wide range of CAM outputs.

Most of the respondents are not building super-high-speed boards; 41 percent said they're working below 50 MHz, while 25 percent are designing from 50 to 100 MHz. The survey did not ask about fast edge rates, which is what experts say really drives signal-integrity concerns.

The survey suggests that signal-integrity tool providers must make a more compelling case to mainstream designers. The tools must be easy to use, inexpensive and based on Windows, the overwhelming platform of choice in this survey.

CAD vendors should note that four of the top five concerns have to do with integration, an issue users have been complaining about for years. It's time for some concrete action to better link schematics, mechanical design and manufacturing to board layout.

Survey results are available at Zuken-Redac's Web site at www.redac.co.uk.





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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