I find it much easier to make resolutions for other people. In that spirit, I offer a list of New Year's resolutions I'd like to see the EDA industry adopt in 1999.

First, wrap up the legal battles as quickly as possible and focus on technological innovation. Users would much rather see a new generation of emulation tools than a three-way court battle among Cadence, Mentor Graphics and Quickturn. And this columnist doesn't want to have to get a law degree to keep covering EDA.

Second, cooperate on interoperability with everyone, even your strongest competitors or legal adversaries. No rivalry is as bitter as that between Cadence and Avant!, but even those companies have many customers in common and tools that need to work together. Some progress on interoperability was made in 1998, but much more needs to be done. No one vendor can provide a complete design solution today, and that situation's not likely to change.

Third, get that register-transfer level (RTL) "virtual prototype" up and running. This term refers to design-planning tools that allow floor planning and early estimations of power, signal integrity, electromigration, speed and area. The RTL virtual prototype is badly needed for deep-submicron IC design but exists only in bits and pieces today. Startups appear to be ahead of the big EDA vendors in this area.

Fourth, listen to what your users are saying about OSes. Most chip designers say they want to stick with Unix and don't want to move to Windows NT. On the other hand, many pc-board and FPGA designers do want Windows NT. And the strong rank-and-file interest in Linux could be turned into dollars by a clever EDA vendor, especially with the stability that Red Hat Software is helping bring to the open-source OS.

Fifth, think big. The growing complexity of chips and boards is choking today's EDA tools in terms of database size and memory usage. Any pc-board or FPGA design tool that's not a 32-bit Windows product should be, and providers of IC-design tools need to prepare for the move to 64-bit Unix. Meanwhile, continuing algorithmic improvements are needed for computational and data-storage efficiency.

Finally, commit to quality. Users are continuing to struggle with software bugs in EDA tools, particularly low-cost Windows-based tools, where ease of use is paramount. Vendors must do a better job of developing, debugging and testing their software.

My resolution is to cover these and other issues important to EDA users. I welcome your feedback: rgoering@cmp.com.