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India's tough EDA paradox
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EE Times


Richard GoeringI'm writing this column in India, where I've been visiting semiconductor, silicon intellectual-property and EDA developers to assess the state of chip design in this country. A great deal of EDA development is taking place here-yet ironically, India cannot afford the EDA tools it needs to be truly competitive in leading-edge IC design.

Some of the software you use may have come from India. Companies with significant involvement on the subcontinent include Cadence Design Systems, Synopsys, Mentor Graphics, Duet Technologies and Ikos.

Cadence has been here for 10 years. In Noida, north of New Delhi, some 160 engineers are working on products such as NC Verilog, the Affirma equivalency checker, and the Leapfrog VHDL simulator. The concept front-end pc-board tools come from here, and the Noida facility is developing new tools in the analog and mixed-signal area.

Also in Noida, Duet Technologies has about 240 engineers working on its deep-submicron library offerings. These engineers are also providing EDA "building blocks" to sell to other EDA or ASIC vendors. Ikos is doing development work in Noida following last year's purchase of Delsoft, a local company.

Synopsys has been in Bangalore, India's Silicon Valley, for four years. That company has 60 engineers working on upgrades to the VCS and VSS simulators, writing processor models for the Eagle hardware/software coverification tool and developing design methodologies and flows.

Mentor Graphics has a new design center in Hyderabad, where roughly 40 engineers are working on a new design-for-test product and developing models for the Seamless CVE verification tool set. Atecsoft, in Chandigarh, is helping startups such as Simplex, Everest and Sapphire Design Automation with EDA tool development.

Despite possessing such EDA expertise, India has a hard time gaining access to EDA technology. Everywhere I go, whether it be a design center for a large multinational or a homegrown company, people complain about the high cost of chip-design tools. In general, Indian customers pay a 15 to 25 percent premium over U.S. prices. In a country where $10,000 per year is considered a good engineering wage, a $150,000 tool is no trivial investment.

Moreover, very few Indian universities have EDA software, so engineers need a lot of training after graduation.

There is a tremendous amount of brain power in this country that can help solve tough chip-design problems. My hope is that some way can be found to get affordable IC design tools into India.





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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