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Apple Gives a Foundry Lesson

By   10.16.2015 0

People in the market for an iPhone 6s or 6s Plus, may have heard that there’s two different chips (Apple’s A9 SoC) powering the phones – one manufactured by Samsung and the other by TSMC. While the chip from both foundries are supposed to perform identically, the manufacturing processes used by TSMC and Samsung are not the same.

Once the secret of the Apple dual sourcing was out, gadget Web sites began testing the phones to compare the two version of the A9 processor. The result showed that the two versions do not appear to operate exactly the same. This could have a legitimate impact on which phone consumers chose, depending on how they use their phones. This situation has led to some consumer concerns that may have been inflated by some unrealistic testing.

One real difference is the physical size of the SoC – the Samsung die is 8% smaller than the TSMC chip. The size difference could be due to some small difference in the transistor size. Both companies have new 3D transistor processes – TSMC advertise its process as 16 nm FinFET, while Samsung calls its process 14 nm FinFET, implying the Samsung transistor should be smaller than the TSMC transistor. But the process names are no longer directly connected to process feature sizes and are now more marketing designations.

The difference in die size might also be explained by the different design libraries used to build the two chips. Even though the chips are functionally identical, the A9 design team had to work with each foundry’s unique design libraries. For example, the SRAM cell used for caches can differ in transistor count and area depending on the design of the standard library. But this difference in die size should not impact a consumer’s experience in any way.

Testing from a number of sites have shown that there’s another difference – the TSMC parts (at least those few tested so far)  have shown to have longer battery lives than the Samsung version. The actual extent of the difference is a matter of some controversy. Some tests, like GeekBench and AnTuTu, have shown a significant difference in battery life between the two chips.

Apple felt compelled to comment. The company said the differences should be only 2 to 3% in real world conditions. Apple’s response gets to the core of the problem: Were the tests real world enough? The tests did show that under heavy CPU-focused processing, the battery did drain faster. But in real world conditions, a normal user would use the CPU periodically, not constantly. That said there does seem to be some significant differences between the two chips and the question is why the difference.

There are two primary reasons why the TSMC chip could get better battery life is lower leakage current or a slightly lower supply voltage than the Samsung part. In general, higher leakage current would mean shorter battery life even during standby operations where as the effects of higher operating voltage would most likely show up under heavy workloads.

Leakage current is the result of transistors that don’t completely turn off in the logical off state, allowing a small amount of current, “leakage,” to pass through. This leakage current is a slow, subtle drain on the battery even while the processor is idling.

In this case, the primary power difference is most likely the operating voltage of each part. In smartphones there is a chip called the power management IC (PMIC) that controls the voltages to the processor that vary under different operating conditions. The PMIC is used to control the fine-grained details of the power management that help stretch battery life by lowering the power of the processor and slowing the clock speeds when workloads are light. In order to hit the same performance and clock speeds as the TSMC part, it is possible that the Samsung parts operated a slightly higher voltage, drawing more power from the battery.

The test that showed the most difference in battery life, suggests the Samsung part is running at a slightly higher supply voltage to meet the Apple’s clock speed requirements. The higher operating voltage could be a result of many different process variables, but the result is higher power consumption under load. For this to be a true judge of the variation in a Samsung vs. TSMC process, it requires a larger statistical sampling than just two chips. Even within one foundry, there can be a significant variation. So the limited tests performed by a few publications cannot be considered the definitive word on the situation.

While the TSMC chip saves some power, the smaller Samsung die size could save Apple some money. Assuming both foundries have similar yields (the percentage of chips that test good over the raw die produced), the smaller die area means that more die can fit onto the same wafer. With additional units yielding from one wafer, the fixed costs for each good die will be lower. The difference in die area is only 8% but this leads to just over 9% more gross die per wafer.

When factoring the effects of early manufacturing yields, this actually translates into about 11% more good die per wafer. The higher good die yield per wafer translates into lower costs per die. The actual cost depends on the cost per good die of packaging and test, but even an 8% die cost savings is significant over tens of millions of units.

In addition, more good die per wafer means Samsung is able to deliver more parts if wafer production is normalized between it and TSMC. With the cost and production volume advantages, Apple may have overlooked a little higher power consumption in favor of lower pricing from Samsung.

For consumers, differences between the chips will be hard to discern. Extreme tests have exaggerated subtle chip differences, but few products get as over-analyzed as those from Apple.

–Kevin Krewell is a principal analyst at Tirias Research.

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rick merritt   2015-10-16 16:48:21

Methinks at the end of the day the Samsung vs TSMC foundry brouhaha shows how little Apple's rapid Web following understands about the nuances of modern semiconductor manufacturing.

realjjj   2015-10-16 17:58:47

You assume that costs at TSMC and Samsung are equal and no reason to do so.

You state about Geekbench and Antutu "The tests did show that under heavy CPU-focused processing, the battery did drain faster". Geekbench battery life test seems to load this SoC some 25-30% and the test offers both a time and a score, the score reflects the work done while testing.  Basemark's battery test takes a similar approach providing both time and score but unlike Geekbench it does put serious load on the CPU. Geekbench had 6-8h battery life, In Basemark it's 2.5h so quite a huge difference in load. Antutu is a system benchmark, not just CPU bound and not a battery test. GFXBench is GPU centric and in its battery life test you get just under 2.5h for this device.

So you might be right about a few things but you certainly made no effort to understand the testing methodology and that's part of the game too. What's the difference on average is unclear for now and if there is a significant difference it must be mentioned that heavy users will see a greater impact so for some users the difference could be relevant.  Apple mentioned 2-3% max difference in battery life not power for the SoC so if that's for users that get 2 days battery life, the ones that get one day or less would see a much greater impact. One site even managed to find a Samsung that is better http://www.tomshardware.com/news/iphone-6s-a9-samsung-vs-tsmc,30306.html

The sad reality is that all review sites have poor to very poor methodology for phones, even the ones that try to do some tests are using questionable synthetic benchmarks so it's all rtaher pointless. To make it worse, some device makers cheat by locking clocks at max when some benchmark apps are detected. Even people that should know better make ridiculous mistakes sometimes. Recently Moor Insights had a so called study where they aim to see if 8 cores are better than 4. http://www.moorinsightsstrategy.com/research-paper-do-8-cores-really-matter-in-smartphones/  The tragedy is that they use certain Qualcomm chips that are .... thermaly chalenged and often perform better when cores are disabled. So their conclusion has minimal value and can't be generalized to other SoCs.

TanjB   2015-10-18 16:18:34

http://www.consumerreports.org/smartphones/battery-tests-find-no-chipgate-problems-in-the-iPhone-6s

Interesting that they have a lab set up for controlled testing of cellphones.

They found no significant difference, which shows Apple have deep copy-exact capabilities despite the foundry differences.

realjjj   2015-10-18 18:16:23

They might have better labs but the same flaws as everybody else. Just 2 chips and poor benchmarks. The article is right on that point.

They should find chips that do show a big difference in some benchmarks to better understand the issue. Properly study and measure the issue with synthetic benchmarks and then test in real world scenarios for different types of users. One page load per minute ( 11h and over 600 page loads) using just mainstream sites that are not putting much load on the SoC won't provide much helpful data. You can't observe the impact of temperature that way either. Users browse in short bursts not 1 page load per minute and 10 page loads in 1-2 minutes on a heavy site followed by 8-9 minutes of idle  would lead to very different results vs 10 loads in 10 mins on an average site. And ofc the sample size problem remains. They put minimal load on the SoC, they artificially keep the screen on more than in normal use by loading 1 page per minute so their scenario would mute any differences in SoC power consumption and is not even feasible in measuring what an average user would get since even the average user would see a bigger difference (if there is any). They don't investigate ,they don't put any effort in devising a viable methodology, they do the same thing as the others. Kinda reminds you of VW, this kind of lack of effort in testing enabled them to get away with it for so long. No idea why the world is so terrible at measuring things, from economic indicators to phone testing, it's just not good enough.

IJD   2015-10-19 06:20:34

As well as smaller chip size Samsung are offering lower wafer pricing, so the cost difference is likely to be bigger than projected. This alone is likely to be why Apple are using Samsung as well as TSMC.

The process -- not chip -- benchmarks I have seen say that the Samsung FinFET process is ~20% higher power than TSMC for the same performance or that the TSMC process is ~10% faster for the same power -- both are due to the fact that the Samsung process needs higher voltage to get the same speed as TSMC, and most of the power when active is CV^2. Leakage is similar and therefore so is standby power, and this is the state a phone CPU spends most of its time in.


In other words, regardless of benchmarks and their inadequacy, there are very good reasons why the TSMC-equipped phones have longer battery life when the CPU is heavily loaded and taking a big chunk of the battery power -- and also why in normal operation there is no significant battery life difference. Both Geekbench and Apple are correct, but they are covering two different usage cases.

None of this should be any surprise to anyone who understands the process technology, which does seem to exclude most people -- especially Apple fans -- commenting on threads like this ;-)

dromdrom   2015-10-19 07:55:27

Not only the Apple web followers have little understanding. Also the EEtimes writer of this article. Two foundries from two different companies will never be able to make identical chips. Especially not if these 2 chips are made in a different process technology.

In fact even the same design made in the same fab will vary across wafers and batches.

rick merritt   2015-10-19 11:25:37

@IJD Can you give references any pubically available technical comparisons of the Samsung and TSMC 16/14nm processes?

rick merritt   2015-10-19 11:25:43

@IJD Can you give references any pubically available technical comparisons of the Samsung and TSMC 16/14nm processes?

IJD   2015-10-19 11:29:11

Sorry Rick, information I have is under NDA. I've seen the same info in a publically (not pubically!) available TSMC presentation (which is why I mentioned it) but I can't remember where...

http://www.tsmc.com/uploadfile/ir/quarterly/2015/16cBq/E/TSMC%201Q15%20transcript.pdf

P.8 states 16FF+ is 10% faster than 14LPP (without naming names), this means 20% lower power at the same speed (from typical cell library benchmarks).

 

Kevin Krewell   2015-10-19 14:17:01

@waaromikke Actually that is exactly the point of the article. I was pointing out how and why there would be difference between two chips made by two different foundries. Lacking direct and public data from the foundries, I was reverse engineering the reasons for the differences.

While individual die will vary between wafers and even across the same wafer, test and screening can sort chips to be almost alike. But because Apple only has one spec, there's no sort and binning parts like PC processor with different speed grades. Apple has only one bin, so unless Apple wants to reject a lot of parts, it has to accept some variability. In this case, the major variable seems to be active Vcc.

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