A story on the EE Times site says that more than 80% of designers employ FPGAs.
A story on EETimes.com written by Dave Bursky caught my attention (see Study: Field-programmable logic rules
). In his words, "Programmable logic devices are continuing their onslaught, usurping more and more of the cell-based ASIC market, according to a recent study of the programmable logic market." Dave's insight is based on a study conducted by A.G. Edwards & Sons Inc. and was jointly sponsored by A.G. Edwards (St. Louis, Mo.), Beacon Technology Partners and EE Times.
When designers were asked what percentage of their design projects employ FPGAs, they said 81% of their projects include field-programmable gate arrays. They said they use complex programmable logic devices (CPLDs) in 69% of their projects, structured or platform ASICs in 28%, and cell-based ASICs in 27%.
I figured the percentage of FPGAs would be high, but not that high. I imagine that's good news to the folks at Actel, Altera, Xilinx, and the like. But they probably already knew that.
The next question I would have asked is what percentage of those designs go to volume production with the FPGAs. The real win for those vendors comes if they can maintain a reasonable high number there.