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Opinion: Incentives for FPGA developers to change

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re: Opinion: Incentives for FPGA developers to change
longimanus   10/22/2011 8:11:37 PM
It's the design philosophy, which matters: If people have industrial ASIC design and verification experience, they know what a nightly regression is. If people come from the rapid prototyping vicinity, they usually tend to 'fix bugs through reprogramming' or rely on the Xilinx Chipscope (in-system debugging) approach. I came to the conclusion, that for each design, there is a certain wall of complexity: Staying below justifies the 'rapid' approach, breaking through it calls for solid verification infrastructure, potentially including nightly regression runs. It's not about tools - it's about methodology and engineering philosophy! I've seen all of this! On one hand, I had very joyful experiences, but on the other hand, I also had nightmare-like experiences with close-to-zero-efficient working days, ending in asking yourself about why the hell are you in this business... Only a sound combination of experience and smart people provides the foundation to aptly recognize the wall of complexity and act accordingly.

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