Contemplating whether Intel's tri-gate transistors at 22-nm will have an impact on the ongoing Intel versus ARM technology race.
Editor's note: The author of this viewpoint is the chief scientist at MonolithIC 3D Inc., an IP that markets technology for fabricating three-dimensional ICs which differs from Intel's tri-gate technology.
Rivalries between companies have a charm of their own. For many years, Intel v. AMD was the talk of the town, and then it became Microsoft v. Google. The most interesting rivalry today is, of course, Intel v. ARM. After Intel's tri-gate transistor announcement, I was therefore not surprised to see these news articles:
At the moment, it certainly looks as though ARM will go planar at the 22-nm node, while Intel will go tri-gate. To judge if tri-gate offers Intel a significant advantage, a few questions need to be answered:
• Intel announced that their 22-nm tri-gate transistor consumed 50 percent lower power when compared to their 32-nm planar transistor. But what are the power savings for a 22-nm tri-gate transistor when compared to a 22-nm planar transistor?
• How much chip power can one save by using a 22-nm tri-gate transistor in a microprocessor instead of a 22-nm planar transistor? Is it 10 percent? Or is it 30 percent? Or is it 50 percent?
It is not difficult to get estimates for these. Let’s take a look.
Figure 1: Transistor I-V characteristics shown in Intel’s press announcement.
Intel showed some detailed transistor I-V curves in their press briefing. These are reproduced in Fig. 1. Using this data, you get the information shown in Fig. 2. You’ll notice that the 22-nm tri-gate transistor can give a 140mV supply voltage reduction compared to the 22-nm planar transistor. The 22-nm tri-gate transistor also provides a 50 percent power reduction compared to the 32-nm planar transistor, but this advantage drops to 19 percent when compared to the 22-nm planar transistor.
Figure 2: Transistor-level comparisons of tri-gate and planar transistors.
I then used IntSim, an open-source IC simulator, to estimate benefits of tri-gate transistors at the chip level. IntSim has models that describe various aspects of a modern-day chip, and its results show a good fit to actual data from past Intel microprocessors. For more details, please refer to Fig. 3 and the original paper about IntSim at the 2007 International Conference on Computer-Aided Design (ICCAD). A GUI-based version of IntSim is available at this link (for free use).
Figure 3: IntSim, a chip simulator, was used for this analysis.
For this study, I considered a 1-GHz mobile logic core built with either (1) 22-nm planar transistors, or (2) 22-nm tri-gate transistors. Since Intel presented only relative numbers for transistor performance, I took numbers from the International Technology Roadmap for Semiconductors (ITRS) and scaled them based on Fig. 2.
Figure 4: Power savings estimated with IntSim.
Results from IntSim are shown in Fig. 4.
• The 140mV supply voltage reduction enabled by the tri-gate device is useful, since it saves both clock and wire power. Fig. 4 indicates a 28 percent reduction in clock power and wire power.
• Transistor drive resistance, which is proportional to the ratio of supply voltage to drive current, is reduced with the tri-gate transistor. Hence, it is easier to drive wire capacitance and gates can be made smaller for the same performance target. This, coupled with the transistor power benefits shown in Fig. 2, gives a 28 percent power reduction for logic gates in the design.
• Repeater power goes down by 32 percent due to the better-quality transistors.
Overall, ~28 percent power reduction can be obtained by using a tri-gate transistor instead of a planar transistor for a 22-nm microprocessor core. This is quite significant. Kudos to Intel’s technology team!
Implications to the Intel-ARM tussle
As an engineer, I really like the fact that Intel is taking the tri-gate transistor into manufacturing—it is a fantastic technical achievement.
But will it play an important role in the Intel-ARM tussle? I don't think so. Let me explain why.
There are several variables involved in the Intel-ARM equation:
• ARM has momentum in the mobile space. I've learned, in my past, that displacing a technology or product entrenched in the marketplace is very difficult.
• Intel's x86 architecture is CISC. Advanced RISC machines, better known as ARM, use a RISC architecture. RISC architectures have historically given higher performance per watt than CISC in the mobile space. Can x86 bridge this gap?
• Intel chips are one process generation ahead of ARM chips. This is a valuable advantage.
• ARM chips are typically made in low-cost fabs in the Far East. For example, fabs in Taiwan are known to be 20-50 percent cheaper than fabs in the U.S., at the same technology node. This is due to additional government incentives, tax breaks, lower building costs and lower labor costs. All these years, having fabs in the U.S. did not impact Intel, since its only competition was AMD, which itself had not-so-cheap fabs in Europe. But while competing with ARM, low-cost fabs could be important.
• There are far more suppliers of ARM chips than x86 ones. Customers like competition as it keeps prices down.
• Who will be the first to "productize" other breakthrough technologies, such as 3-D stacking of DRAM atop logic, and monolithic 3-D? Intel or ARM? Some of these technologies could provide more benefits to mobile chip power, performance and die size than tri-gate.
• Intel has a lot more resources than players in the ARM world - this could be useful, especially in this day and age when designs cost $100M, fabs cost $5B and process R&D costs $1B.
• Will Microsoft execute on its goal to get Windows 8 on ARM? How soon and how well will it execute? This is a crucial business issue for laptops and netbooks, but may not impact the smart-phone world much.
Bottom line: The tri-gate transistor is a major engineering achievement, but I doubt if it will play a key role in the Intel-ARM tussle. In my opinion, many of the points mentioned above are more important.
Dr. Deepak Sekar is the chief scientist of MonolithIC 3D Inc. Author or co-author of a book, an invited book chapter, 15 publications and 55 issued or pending patents, he serves as a program committee co-chair at the International Interconnect Technology Conference.