A roundup and summary of memory design articles across the network this month.
This month the network saw several memory-related design articles, including articles on how to analyze DDR4; signal integrity and LRDIMMs; MBIST best practices; and how to make the most of embedded flash. See the summaries and links below.
Product how-to: HSPICE accurately analyzes gigabit circuits like DDR4 & USB3
In this article, Hany Elhak and Ted Mido of Synopsys argue that accurate SPICE analysis at the PCB level can save time and reduce costs by eliminating numerous iterations of PCB prototyping and measurement. They show how HSPICE can be used to analyze numerous circuits, including DDR4 and USB3.
LRDIMM vs RDIMM: Signal integrity capacity bandwidth
Over the last few years, companies in the memory ecosystem have worked closely to continue advancing the system memory roadmap for enterprise applications. In this two-page article, IDT's Douglas Malech aims to highlight the advances the industry has made with the latest memory technology, DDR4 LRDIMM. Topics include centralized vs. distributed buffers, LRDIMM rank aware controllers, and optimizing component latency.
Memory Built-In Self Test (MBIST) verification: Best practices & challenges
Verification of functioning MBIST is an essential part of any SoC design cycle, since it allows the designer to detect any issues beforehand. In this paper, Freescale Semiconductor's Abhilash Kaushal and Kartik Kathuria discuss the general issues faced, and best practices to be followed, during MBIST verification.
Embedded flash process enhances performance: Product how-to
In this data-heavy article, Jae Song of Dongbu HiTek looks at a new embedded flash (eFlash) process and argues that the new process is especially well suited for embedding flash into touchscreen controllers and microcontroller units.