If papers from IEEE's 2016 IEDM in Dec are any indication, it appears the era of PCM and RRAM based brain-gates is upon us. Here's Part I of a 2-Part blog based on IEDM gems.
Features of the papers at IEDM 2016 were words and phrases like ultimate, unlimited endurance and record breaking, many of which were deserved. The characteristics of PCMs and RRAMs, which have made them attractive for large NV memory now make them an even more attractive proposition for biological brain-like functions with a minimum of additional components. It would appear the era of PCM and RRAM based brain-gates is upon us.
The use of PCM/RRAM cells for persistent memory as a DRAM replacement or as components in the brain-gates of the more distant future, will require high levels of reliability. A team from IBM's Phase Change Memory (PCM) Group USA, ULVAC, Inc. Japan and Macronix International, Taiwan, [Ref 1] might have finally found a solution to a problem which has plagued PCM throughout the 50 or so years of its development. It is the problem of electro-migration, resulting in element separation which causes unacceptable changes in memory device characteristics.
Their solution involves: the use of a high aspect ratio, slightly tapered (diameter 36 to 42nm bottom to top), metal lined (~3- 4 nm) and confining memory cell. With the diameter of active region at the mid-point (~24) nm. Typical cell depth 140nm. A similar device structure was used in IBM's so called “Projection PCM” device.4
Figure 1 illustrates the way in which the element separation becomes stabilized. Initially the active material switches at a hot spot close to the bottom electrode. In the first ten write/erase cycles electro-migration effects cause the active switching volume to move towards the upper electrode.
Because of the slight taper in the pore structure the switching region reaches a location where the forces of electro-migration are exactly balanced by the forces of back-diffusion from the concentration gradients of Te and Sb. The regions on either side of the core active region remain permanently crystallized and act as extended top and bottom electrodes. Estimates of the current density at the balance point are difficult because the current is shared with the liner. It would appear to be of the order 2 x 107 Amps/sq-cm, although it is no longer important because electro-migration has ceased.
An equally important part of the solution, as illustrated in Figure 1, is the use of a thin metal liner, where it is the choice of the correct metal (not yet disclosed) which makes the memory cell immune to the classic endurance failure mechanism of void formation. The confinement of the active material in a very small pore prevents any lateral element separation and is the final part of the fix.
The metal liner, the tapered cell, active material confinement and void-free electro-migration controlled PCM GST based devices yield a new record for endurance of 2x1012 write/erase cycles, without the stuck-at-SET failures.
I raised with Dr Wanki Kim of IBM my concerns regarding the possibility of the device having a different level of reliability, especially data retention, during the first ten or so cycles when the switching region is moving to its stable position during what must be regarded as a forming step. He commented:
“We don't think this is a forming process because all characteristics of 1st cycle and subsequent cycles are identical such as programming current, set speed.
The proof of the effectiveness of the solution can be seen in IBM's EDX results of figure 2, clearly showing the Tellurium (Te) and Antimony (Sb) enriched regions close to the electrodes.
Historically the idea of trying to balance the forces of electro-migration with back diffusion is not new. For large area planar PCM structures depositing a tellurium film between the top electrode and the active material was tried. Another approach was to move the active material composition away from stoichiometry to a point where the characteristics would be changing as a function of composition. Then use the balance in the change of composition on either side of a central planar region of the device to cancel the positive and negative changes. Both attempts failed because the element separation is three dimensional in nature. The solution is confinement and is what IBM and their international colleagues have achieved with the diameter of their tapered pore structure. Only possible at with today's high resolution lithography.
There is the possibility of another very beneficial outcome of the use of the metal liner as a solution to the problem of thermal crosstalk as illustrated in Figure 3.
While in the past a great deal of effort has gone into providing thermal barriers, why not go in the other direction and use metal heat sinks. Especially when the active material is concentrated in a small core region of a high aspect ratio pore structure and where in this case Figure 3 the metal liners provide a path to conduct the cross talk heat away from the active material. The liners would need to have high thermal conductivity and low electrical conductivity.
PCM pushing the limits.
Building on earlier work [Ref 2] a team from Stanford, Pittsburgh, Illinois Urbana-Champaign Universities, explored the possible scaling limits of Phase Change Memory (PCM) devices. Part of this work focussed on lateral carbon nano tube (CNT-PCM) structured devices. These were fabricated by creating nanogaps (~10 to 200 nm) in the middle of CNTs which were “cut” with AFM tips or electrically.
Films of amorphous GST (~10 nm thick) were sputtered to cover the device to fill the nanogaps, either directly or through a self-aligned process. The resulting cells had active material volumes of some tens of nm3 with threshold voltages of 3Volts (After first switching forming at 5 Volts) and claimed reset current values <1.6 μA for <40 fJ per bit, two orders of magnitude lower than existing state-of-the-art PCM devices.
From thermodynamic considerations the authors calculated
the lowest value of energy required to reset a PCM cell as:
≈ 1.2 nJ/nm3, This would be the reset energy needed to reset a cell perfectly insulated thermally (adiabatically) from its environment. Equivalent to an infinite thermal boundary resistance (TBR = ∞) at the PCM interface with the metal electrodes and the dielectric layers in which it is embedded. In pursuing those limits the authors offered a cautionary note, while it might be possible to scale GeTe films down to ~3.8 nm thickness (12 atomic layers), beyond that overlapping metal-induced gap states (from the metal electrodes) would reduce the on/off ratio.
If possible, while the fanciful world of adiabatic perfection would offer a tantalizing reduction in reset current of some 2 orders of magnitude. As figure 4 shows even though their high aspect ratio CNT devices (black squares) already offer significant reset current improvements over the best more conventional structures (blue circles) the associated current densities the red line I have added, indicates a current density of 1 x 10E8 A/sq-cm for the CNT group and would be unlikely to result in highly reliable PCM devices.
In the dream world of adiabatic perfection, reliability may not be the most serious of problems. To return PCM material from its molten to glassy state requires quenching and quite how that would occur in an adiabatically perfect device is a bit of a mystery.
However, not all may be lost, there might be a sweet spot on the way to adiabatic perfection where the cooling rate, while sufficient to create a glass, is slow enough form a more perfectly annealed amorphous state and from a device perspective a memory less susceptible to drift.
Would it be possible to simulate the effects of near perfect adiabatic conditions of a slow quench by adding a trailing edge to the reset pulse. I will try and get the drift experts at IBM to answer this question.
Concentrating on the electrode to amorphous interface the authors of [Ref 2] did introduce WTe alloys as possible new materials for PCM electrodes, offering low electrical resistivity and thermal conductivity and capable of handling high current densities.
Another design option offered was the possibility, for a vertical “pore” structure, of positioning a layer of graphene between the bottom electrode and the active material. Perhaps surprisingly this would act to minimise lateral conduction across the bottom electrode surface.
MRAMs blur the future.
For PCMs and RRAMs 2016 was a year where good progress continued to be made in solving fundamental problems including new under standing of the effects of cell structure, materials and extreme operating limits. However, an announcement by Toshiba with Hynix of a 4Gbit MRAM at IEDM-2016 and even although perhaps 3 to 4 years away from the possibility of a commercial product it blurs the future for PCM/RRAM. It hangs like some Sword of Damocles over the future application of PCM and RRAM in the area of large persistent memory. It may be time for the PCM and RRAM communities to look at brain-gates as a potentially more rewarding future direction where their technologies will be able to offer unique features.
In Part 2, I will look at some of the innovative ways which the unique features of PCMs/RRAMs in a mix with conventional single crystal silicon have been used to create the neurons and synapse-like Brain-gates of tomorrow.
—The career of Ron Neale, as a researcher, process developer, and designer of solid-state memory devices, stretches back over 50 years. More recently he has been involved as a consultant, writer, and keen and critical observer of the latest memory developments. His EE Times Progress Reports on the state of play in memory developments have a large following. He has a number of firsts in memory device development and manufacture in the areas of phase change memory (PCM) and programmable read-only memory (PROM), including anti-fuzes and programmable VIAS. He holds 20 patents in the area of memory and programmable interconnect and is a member of The Institute of Physics and a Chartered Physicist. He is also qualified as both a mechanical and electronic engineer. As well as memory device development and research, Ron has also held senior positions in companies involved in computer development and the manufacture of semiconductor fabrication equipment, as well as serving a stint as editor of Electronic Engineering magazine.
 ALD-based Confined PCM with a Metallic Liner toward Unlimited Endurance,W. Kim et al, Proc IEDM 2016.
 "Towards Ultimate Scaling Limits of Phase-Change Memory," by F. Xiong et al, Proc IEDM-2016.
 Neale, Ron. "IBM Solves PCM Problems with Projections", EE Times,
9/3/2015 10:00 AM EDT https://www.eetimes.com/author.asp?section_id=36&doc_id=1327596
 Neale, Ron. "IBM's First Novel PCM Fix" EE Times, 7/24/2015 03:00 PM EDT.https://www.eetimes.com/author.asp?section_id=36&doc_id=1327229
 Neale, Ron. "IBM Takes A Second Turn at PCM Drift" 7/31/2015 05:00PM EDT, https://www.eetimes.com/author.asp?section_id=36&doc_id=1327314&