What is 3D Super-DRAM and why do we need 3D Super-DRAM? The CEO of Besang makes the case.
However, vertical SGT is extremely simple compared to recessed transistor. Vertical SGT needs only 2 masks. So, it saves 3-4 mask steps. For example, no source and drain mask, no recessed gate mask, no word line mask, and no buried bit line mask are needed for vertical SGT. If you have impression that 3D Super-DRAM is expensive to make, that is not right. Process and structure of 3D Super-DRAM are successfully verified. Device functionality and reliability are also well verified.
Here is the summary. 3D Super-DRAM enables 400% more die-per-wafer with simple process, minimized uncertainties, and fast time-to-market. If you consider planar DRAM shrinking from 18nm to 16 nm, then, 20% more die-per-wafer could be achieved. To do so, multi-billion dollar should be invested for R&D and EUV must be required. In case of 3D Super-DRAM, it needs less than $50M for R&D and no EUV; even so, it could produce 400% more die-per-wafer.
<[?Scaling of planar DRAM becomes extremely difficult mainly because aspect ratio of storage capacitor exponentially increases as device shrinks. As planar NAND faces its scaling limitation and is successfully transformed to 3D NAND, planar DRAM should find out its path to 3D DRAM in short time. Otherwise, lifespan of DRAM will end in few years.
—Sang-Yun Lee is the CEO of BeSang. Inc. BeSang is open to collaborate with system makers to introduce 3D Super-NOR NVDIMM to the market.