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Why Memory Prices Are Heating Up

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Sang-Yun
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DRAM and NAND Prices Keep Rising
Sang-Yun   9/22/2017 7:50:21 PM
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Without "GAA+M3D" memory solution, DRAM and NAND prices will keep rising.



Sang-Yun
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DRAM supply to remain tight in 2018, says DRAMeXchange
Sang-Yun   9/22/2017 7:46:35 PM
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Paul98
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Exponential
Paul98   9/22/2017 3:04:23 PM
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And that's just the beginning. I think of the quarries of African and Asian minerals, which is starting to dry up. The marketing effect and over-consumption that benefit multinationals is the primary responsibility

FChen
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Re: Lack of 2nd sourcing in 3D NAND
FChen   9/6/2017 8:43:35 AM
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Each company/JV is the sole supplier of its own version of 3D NAND. That makes each process more expensive, like one of a kind. Can only get 3D FG from Intel/Micron, 3D TANOS from Samsung, 4-metal U-shaped channel from Toshiba/WD, 3-metal U-shaped channel from SK Hynix.

Sang-Yun
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Re: Lack of 2nd sourcing in 3D NAND
Sang-Yun   9/5/2017 10:47:19 PM
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Interessing! Could you be more specific about your thoguhts?

FChen
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Lack of 2nd sourcing in 3D NAND
FChen   9/5/2017 10:20:06 PM
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Another contributor to 3D NAND prices staying up is the uniqueness of each vendor's 3D NAND process integration and architecture, unlike their relative similarity for planar NAND. Intel/Micron is floating-gate, Samsung is TCAT, Toshiba/WD is P-BICS, SK Hynix gate layer count is off from the others, and uses fewer metal layers.

Sang-Yun
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Re: Your DDR4 NVDIMM comment about possibly replacing DRAM
Sang-Yun   9/4/2017 4:15:21 PM
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sranje, please check the following websites for more information. 3D XPoint is about 1,000x slower than DRAM in writing mode. However, reading is just 2.5x slower than DRAM. So, DRAM works are a write buffer as shown in the figure. In the reading mode, data could be directly read from the 3D XPoint. It is basically NOR flash memory. So, low cost NOR (i.e. 3D Super-NOR) could replace 3D XPoint.

1. https://www.kitguru.net/components/memory/anton-shilov/intel-first-3d-xpoint-ssds-will-feature-up-to-6gbs-of-bandwidth/

2. EE Times: Will Stoarge Class Memory Disrupt Memory Hierarchy? - http://www.eetimes.com/author.asp?section_id=36&doc_id=1331205



 

sranje
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Your DDR4 NVDIMM comment about possibly replacing DRAM
sranje   9/4/2017 2:10:00 PM
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Hi Sang Yun, 

Could you kindly explain your comment:

         DDR4 NVDIMM is a possible way to replace DRAM indirectly along with DRAM buffers.

All memory interface vendors (IDT, Montage, Rambus (ex-Inphi) are offering RCDs and DBs for DDR4 NVDIMM but there appears to be little adoption as of yet

Also - are NVDIMM modules hybrid (NAND + DRAM) or NAND only?

Many thanks in advance

 

realjjj
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Re: Plot 3D NAND die size vs layer number
realjjj   9/4/2017 11:40:59 AM
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I look at it as a positive sign on yields, they wouldn't go larger otherwise. If you look back at 2D,  130mm2 or even larger is normal, if anything 100mm2 and less was unusual and maybe a sign of trouble.

It does seem problematic to keep bit growth at around 40% per year but 4 bits per cell, higher array efficiency and yeah maybe a shrink should help in the next few years.

I think Samsung at FMS mentioned the possibility of a shrink after their 96L, alongside logic under the array and string stacking.

Sang-Yun
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Re: Plot 3D NAND die size vs layer number
Sang-Yun   9/4/2017 11:16:11 AM
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resistion, I agree with you. Die size of 3D NAND is related to poor process architecture of 3D NAND becasue it is focusing on vertical scaling, not on lateral scaling. In fact lateral scaling is much powerful than vertical scaling as shown in Fig. 3. Effetive cell size of 3D NAND is equvalent to 90nm planar NAND cell size. It is the reason why 64-layer just achieves price parity with planar NAND and, for the time being, 3D NAND did not contribute low cost NAND at all. Another important concern is that, becasue 3D NAND already reached 64-layer, it lost expansion capability as explained in this article. So, it will be difficult to expect low cost NAND with conventional 3D NAND.  

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