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MIPS: Underdog or Dead Horse?

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KarlS01
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Re: Virtual whatever?
KarlS01   9/29/2017 3:51:23 PM
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"if you can use a RISC processor as effectively a microcode level to implement some other architecture" 

That is what compilers do:   They make the RISC emulate the if/else, do, while, for, and assignments that everyone uses.

The thing is that emulation like an interpreter will always be slower than a design that implements the compiler source directly. Basically a compare of some sort is done and either the next sequential statement is executed or a target(non sequential) statement is executed and it can be done in a custom design without the compile and emulation needed for a RISC.

Given the amount of block memory that can be put on a chip, many applications may not  require cache or external memory. So why do we need a RISC?  As someone said previously CPU is declining.

tb100
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Re: Virtual whatever?
tb100   9/29/2017 1:28:53 PM
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"if you can use a RISC processor as effectively a microcode level to implement some other architecture" That's what AMD did back in 1996 when they bought NexGen, which used its RISC architecture to emulate an x86 processor. AMD used it as a basis for their K6 x86 chip.

Marc Laventurier
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Re: ...importance of CPU is ever declining
Marc Laventurier   9/28/2017 4:52:17 PM
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Thanks for the correction - have been out of the academic circuit for so long, didn't realize that Stanford had gone all fancy with a name like Marc Tessier-Lavigne.

TonyTib
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Re: ...importance of CPU is ever declining
TonyTib   9/28/2017 4:09:39 PM
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Hennesy is now the former president of Stanford IIRC.  And his work was the basis of MIPS.  

perl_geek
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Virtual whatever?
perl_geek   9/28/2017 3:27:34 PM
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Just a follow-on thought to that; if you can use a RISC processor as effectively a microcode level to implement some other architecture, (a process not wholly unlike what Intel have done with X86, and what Transmeta tried to do), whose design rights (if any) are being infringed, and how? "Gentlemen, start your lawyers." (I trust the ladies will tolerate a paraphrase.)

realjjj
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Re: ...importance of CPU is ever declining
realjjj   9/28/2017 2:46:20 PM
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Wouldn't look at it as just an open source ISA as it enables open source cores and SoCs, an entire ecosystem. In the end, we are talking about MIPS' valuation and a modern open source ISA with broad support is a substantial threat that has to be factored in.

Marc Laventurier
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Re: ...importance of CPU is ever declining
Marc Laventurier   9/28/2017 2:11:45 PM
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Just to note that Dave Patterson at Berkeley, one of  the two key figures in the development of RISC in the '80s (the other being now president of Stanford, John Hennesy) is also a key figure in the RICS-V open source movement.

jmrowca
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MCHP bases PIC32 on MIPS core
jmrowca   9/27/2017 5:22:30 PM
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Let's not forget that MCHP did decide their 32bit PIC would be MIPS based, instead of rolling their own 32 bit MCU solution. That was before the ATML acquisition whereupon MCHP inherited a Sir Robin (hood) Saxby licensee of ARM. You wonder if we may ever see an ARM married to an ADC/DAC MIPS mixed IP.  Do not believe the Cray historic folks have much forward looking interest in MIPS IP.

perl_geek
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Where CPU identity matters
perl_geek   9/27/2017 4:29:33 PM
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Every generalisation I make here is subject to ceteris paribus, and nobody producing any revolutionary algorithms or paradigms, (e.g. easy parallelisation), while I wasn't looking.

As far as software is concerned, CPU identity is not a big deal today. From the application level, and most system-level software POV, exactly what sort of gerbils are running around down below shouldn't matter very much. As long as gcc can be, and has been, ported to the kit, everything else can follow. Device-driver writers are about the only people likely to be seriously bothered.

The hardware level of design, where you are looking at critcal power budgets, response windows, the ability to address particular kinds of devices, and other aspects of ugly reality, is a different matter. Thar's why you have x86s holding onto the general-purpose world, (admittedly partly due to enormous software inertia), ARM-waving on slabs, and NVIDIA flipping pixels.

If a design family can find a chunk of the Venn diagram that it fits better than anything else, because of some fundamental attribute, then it'll probably survive. Paradoxically, it'll probably last longer if that piece is small, so there's no incentive to hammer other CPU designs into it.

jamestate
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Hmmm...
jamestate   9/27/2017 3:29:44 PM
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Cavium and Action's latest processors (ThunderX and S900) are ARM based. There haven't been that many recent releases with MIPS based chips. The Mobileye chip seems to be one of the few exceptions.

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