After making the sometimes excruciating transformation from gate-array supplier to system-level integration house, Toshiba Semiconductor Co. is beginning to reap the rewards.
The Tokyo-based company, which ranked as the eighth-largest ASIC supplier in 1999 and was among the top chip makers overall, now boasts a system-IC run rate of more than $3 billion-accounting for nearly 40% of TSC's total revenue. In the last six months alone, the company's North American SLI business has grown more than 30%, said Allan Cox, senior vice president of business development at Toshiba America Electronics Corp. (TAEC), the domestic arm of TSC.
Times were not always this good. As the gate-array market shifted to standard-cell ASICs, Toshiba was ill prepared to let go of what had been the core of its non-memory business. "We've made the transformation back from a gate-array company to one developing system-level ICs," Cox said. "It was very painful, but we've gone through the worst part."
Analysts agree that Toshiba has made considerable progress. Even taking into account currency fluctuations in 1999, Toshiba grew its cell-based ASIC business by 50%, according to Bill McClean of IC Insights Inc., Scottsdale, Ariz. Cell-based revenue now accounts for roughly $300 million of Toshiba's $650 million in ASIC sales, McClean said.
The company's focus on embedded-DRAM technology has also been a cornerstone of its system-IC strategy, though it may be the reason Toshiba did not grow as fast as some of its peers, said Bryan Lewis, an analyst at Dataquest Inc., San Jose.
"During 1999, DRAM prices took a huge drop, and a lot of people pushed out designs using embedded DRAM because they could get it cheaper off-chip," Lewis said. "Toshiba may have been ahead of its time in this area, but in the long run it could work to its advantage."
Toshiba credits its SLI growth to an increased emphasis on developing IP, I/O cells, and advanced packaging technologies, and forging EDA relationships. "To us, SLI is not as much about the chip we deliver as the mix of packaging, EDA tools, IP, and design skills," said Peter Richmond, System IC business development director.
Earlier this month, the company added 64-bit MIPS functionality to its IP portfolio, in the TX49 processor core. The core, with an optional floating-point unit, features up to 32 Kbytes of instruction cache, 32 Kbytes of data cache, and operates at 150 MHz.
Of course, there is room for improvement. Analysts said Toshiba still lacks a broad IP library and a well-rounded microprocessor and DSP portfolio to address the application segments it targets: communications, computing, and digital consumer.
Toshiba is also struggling-along with its competitors-to keep up with the changing SLI design-in environment. Though its manufacturing processes are as advanced as the market leaders'-Toshiba's designs now average 2 million gates drawn at 0.14 micron-design tools and methodologies are far behind the silicon technology. As a result, the ASIC industry is limping toward the 5 million-gate plateau, according to Jeff Berkman, vice president of engineering and SLI at TAEC. "We see well over a two-year lag in EDA tools," Berkman said. "We're developing our own tools to backfill where the industry is not keeping up."
For example, Toshiba is working with several outside partners to develop tools that perform high-level RTL validation before a design moves to the netlist stage, at which point it is too late to make changes without tying up sizable resources, Berkman said.
Toshiba's System IC unit encompasses bipolar ICs, ASSPs, and RISC chips that go into Sony PlayStation game platforms, as well as ASICs and embedded DRAM.
Its ASIC business is composed of gate arrays, embedded arrays, and standard cell. Pure gate-array revenue now represents only one-third of the company's ASIC business, while its embedded arrays are gaining customer interest. "New [gate-array] designs are very low-it's not really even an offering anymore," Richmond said.
The company this year has undertaken a major expansion of its manufacturing base to beef up production of system-level ICs. Parent company Toshiba Corp. is investing $280 million in a new facility in Oita, Japan, to increase monthly wafer capacity from 12,500 to 17,500. Additionally, Toshiba's foundry relationship with Taiwan-based World Semiconductor Manufacturing Corp. has been transferred to WSMC's new parent, Taiwan Semiconductor Manufacturing Corp.