SAN FRANCISO The U.S. National Science Foundation (NSF) and semiconductor university-research consortium Semiconductor Research Corp.(SRC) have launched a three-year joint initiative focused on multi-core chip design and architecture, the organizations said Tuesday (Sept. 2).
The program will focus on several components of multi-core system architecture design that can enhance and accelerate solutions for advancing semiconductor performance, the organizations said. About $6 million in funding is available to U.S. universities, who have been invited to submit research proposals in key areas, the organizations said.
Specific areas of research for the program include computer-aided design (CAD) for multi-core systems, such as acceleration of design automation tools via multi-core platforms; interconnect, packaging and circuit techniques for multi-core; and low-power innovations, according to the organizations.
"As Moore's Law scaling becomes more difficult, researchers must explore new means to insure continued technological advances in computing," said Sankar Basu, NSF program director, in a statement. "CMOS scaling is increasingly limited by the realities imposed by physics, making architectural innovations critical to achieving increased computational performance. Multi-core-based systems promise computational performance enhancements and power reduction for both high- and low-end computing platforms."