DALLAS -- Texas Instruments Inc. today introduced a two-chip set for asymmetric digital subscriber line applications in central office equipment, which TI said doubles the density of ADSL channels on printed-circuit boards and cuts power consumption by 50% for both full-rate and G.lite transmissions.
TI's AC5 chip set comprises of a DSP-based, eight-channel transceiver -- with integrated RISC controller, DSL logic and memory -- and an octal codec device with onboard line drivers. The chip set empolys what TI calls its fifth-generation ADSL technology, packing ADSL modems into 1.2 inches of board space with less than 1.3 watts per modem.
The Dallas-based company also has some other "tricks up its sleeve" to further reduce power consumption by another 50%, hinted Ben Sheppard, ADSL product marketing manager. One of those tricks is a new dynamic power control technology for reducing channel power consumption. TI is not releasing details about that technology, which has been patented.
"In certain situations this could reduce the power usage by 50% to 650 milliwatts for full-rate solutions, including the line drivers," he said. Currently, TI is offering the chip set with a worst case power consumption of 1.3 W per channel.
The central office chip set is one of a number of products TI is aiming at the growing market for DSL solutions. According to TI, the number of new digital subscriber line connections is expected to grow reach 4 million in 2000 with 30 million DSL lines being deployed worldwide in 2003. Growth of central office capability is one of critical elements to enable that growth rate, Sheppard noted.
To be a big player in this potentially huge chip market, TI has pulled together all of the silicon and software needed for complete ADSL solutions, according to the product marketing manager. "We offer the only solution where we own all of the software, line drivers and other capabilities. We don't point fingers at anyone," he added, referring to the potential for incompatibility or system design problems when engineers use products from multiple suppliers.
The new chip set's transceiver is based on TI's 320C6000 digital signal processor (DSP) core. It also contains an ARM7 RISC processor core, optimized logic for ADSL, and all the necessary memory for program and data, said Sheppard.
"This is the first ADSL chip set based on a programmable DSP that has open platform for customers to add specific value and features," he added. The integrated codec supports the analog frontend functions for the eight-channel transceiver.
Samples of the AC5 chip set will become available by the end of June, with volume production slated to start in the fourth quarter of 2000. TI said pricing for the chip set is set at $160 each ($20 per channel) in quantities of 100,000. Evaluation modules are scheduled to be made available in the third quarter.