SAN JOSE, Calif. The electronics industry downturn has caused its fair share of soul-searching among chip vendors as they grasp for the next big thing that will get customers buying in large quantities again. One route is to drive down the prices of tailor-made silicon such as ASICs and programmable-logic devices.
To that end, Altera Corp. this week will introduce the Cyclone FPGA, built from the ground up with low cost in mind. When volume production begins in earnest in 2004, Altera says, the price tag will start as low as $4 for an architecture the company claims is the equal of the Virtex 2 from rival Xilinx Inc.
For programmable-logic vendors, the most obvious way to lower cost is to reduce the size of their devices, which, by design, are much larger than ASICs because they are stuffed with logic elements and gobs of active interconnect the price of making logic chips that are programmed through a PC instead of a mask set. "FPGAs have always had the stigma of being high cost," said John Daane, president and chief executive officer of Altera, based here.
Indeed, pricing has traditionally been something of an afterthought for FPGA vendors, fond of creating full-featured devices that include all the bells and whistles they can muster for a given process technology. Then, when a new process technology node is ready, they'll shrink the die, remove a few features, cut out some of the embedded memory, drop the price and give it a new name. But the logic-cell arrangement is essentially the same.
What Altera has done is create two different FPGA architectures for the 0.13-micron process technology node: its recently introduced Stratix line to serve the high end, and now Cyclone to serve a number of lower-end markets that the company said has so far been out of its reach. These include set-top boxes, low-end routers, telematics systems and process control equipment.
"We feel we have a chance to displace a $2 billion [ASIC] industry at the low end," Daane said.
Altera's first and largest Cyclone device the EPIC20, with 20,060 logic elements will be introduced in the first quarter of 2003, less than a year after Stratix hit the streets.
Looking at the pricing model, it's clear too that these devices were not made for piecemeal orders. Prices next year will range from $60 to $7, depending on the number of logic elements, assuming purchases of 50,000-unit quantities or more. When volume ramps in 2004, prices will range from $40 to $4 based on 250,000-unit quantities, according to the company.
This isn't Altera's first attempt to open up the volume production floodgates. A year ago it launched its HardCopy program, which allows customers to convert FPGAs into mask-programmed ASICs. But this service is primarily intended for existing customers already partial to FPGA design, not the unconverted.
Small from the start
With Cyclone, customers won't have a chance to switch to a mask-programmable ASIC because the architecture is already so compact that the chip's size is limited by the I/O pads around the periphery of the die. The architecture was designed to be small from the get-go. Compared with Stratix, it's 60 percent smaller.
To do this, Altera kept out much of the logic, routing, I/O, memory and other features that tend to bulk up PLDs. This did not come without a price. Embedded-memory performance, for example, will suffer compared with more full-featured devices, acknowledged Tim Colleran, vice president of product marketing at Altera.
This may seem risky, but not all designers need all the features FPGA vendors like to heap upon them. Often what's more important is that users have sufficient complexity within a given family to get the job done using one device, said Rich Wawrzyniak, a senior analyst with Semico Research. "As soon as you start telling people you need two of the same thing, you're done. Nobody can afford to do that," he said.
Still, mindful of the trade-offs of building a low-end device, Altera spent more than half of the 15 months it took to develop Cyclone asking customers what they want and what they can do without. The company then evaluated the different scenarios using an internally developed physical-modeling tool. Some things were left out, such as embedded flash memory, which would have increased cost by 35 percent.
Among the hardware features that made it in were an external interface to double-data-rate and fast-cycle RAM, differential signaling, embedded memory and phase-locked loops. The company also included what it considers some must-have features, like 66-MHz PCI, I/O bus hold and programmable slew rates.
"We didn't just go back and take a full-featured family and slice it down to get the cost out," Colleran said.
To sweeten Cyclone's appeal, Altera said users can embed a 32-bit RISC processor and subsystem including peripherals like UARTs, Ethernet interfaces and RAM for less than $2. Altera said it expects that hardware engineers in particular will like the processor core, dubbed Nios, because it's inexpensive, works with GNU C compilers and frees them up to write their own housekeeping code without having to deal with finnicky software design teams.
One of the dangers of coming out with similar products within a short time span in this case, Stratix at the high end and Cyclone at the low is the risk of fragmentation, and of breaking the continuity of existing architectures and design methodology. But Daane insists Cyclone won't cannibalize Stratix because it was made for applications that now shy away from programmable logic.
Altera's move also reflects the reality that the communications market, once the golden goose for PLD makers, isn't expected to fly back home any time soon. The possible replacements may not demand the powerful signal-processing capabilities of the high-end parts, but neglecting them may no longer be an option.