# How statistical sensitivity makes designs manufacturable

*"In a manufacturing environment, your amplifier design doesn't have a performance: it only has performance statistics."*

**Introduction**

With present-day computers and commercial CAD software packages, it is now possible to comprehensively address manufacturing parameter issues in the initial design and optimization phase of product development. Some of the obvious benefits of this breakthrough are:

- We design a more manufacturable product
- We eliminate (or at least reduce) the costly iteration cycles between design and manufacturing
- We design-in reliability

*in the initial design*is becoming increasingly important to the design of a manufacturable product.

There are two types of failures encountered during manufacturing:

- Catastrophic Failure — Failure due to physical problems in the unit, such as poor solder joints and material failures.
- Parametric Failure — Failure due to parameter variations encountered during manufacturing or service life.

**Present-day design**

A typical present day design process is shown in Figure 1. Manufacturing is characterized here by uncertain parameter values, which can give rise to parametric failures in the unit when tested.

Figure 1 — Present-day design

Too many parametric failures during post-manufacture testing require a redesign and another manufacturing attempt.

**Design for manufacturing (DFM)**

Using DFM, also called statistical design, we outfit the design engineer with models of the test and manufacturing environment (Figure 2). Together with specialized CAD tools that make use of these models, the design engineer can better fit the design into the parametric environment that will be encountered during manufacturing, *in the design phase of product development.*

Figure 2 — Design for manufacture

Statistical design techniques and CAD software can characterize and desensitize sensitive RF and microwave designs, and center them within their manufacturing environments.

**Statistical design**

A manufacturable design gives acceptable performance over the entire range and combinations of parameter values encountered during manufacturing.

An approach to statistical design is graphically shown in Figure 3. In this approach there are four major steps:

- Step 1 — Develop and single-point optimize the design
- Step 2 — Perform a statistical analysis to determine performance statistics
- Step 3 — Determine if the performance statistic(s) are acceptable and access any statistical sensitivity among the statistical variables
- Step 4 — If necessary, statistically optimize and re-analyze yield

In Step 2 we assign statistical variations (statistical models) to all the parameters that will be varying during manufacture. Then a CAD software package performs a statistical analysis by estimating the performance variations (performance statistics) due to the parameter variations (statistical models). Step 3, evaluating the statistical performance of the design, is the focus of this paper.

Figure 3 — Design for manufacture

Statistical design optimizes the design's performance statistics.

**Measures for manufacturability**

There are many statistical measures that will characterize the manufacturing performance of a design, including the performance mean, standard deviation and variance, as well as more complex measures like the Tagucci S/N. But a universal measure that is most useful in statistical design is yield. Yield is defined as:

We will now discuss three important statistical data displays used to evaluate a design's statistical performance. All are now available in today's CAD packages.

**Measurement histogram, MH**

A measurement histogram is a histogram graph of the number (or percentage) of occurrences of a measurement versus the measurement values. The measurement histogram gives the spread of measurement values that were encountered during statistical analysis. An example is given in Figure 4.

Figure 4 — A measurement histogram

MH's can help you set the design's specifications for an acceptable yield value. Just set the specification to include the desired percentage of measurements. This may be necessary in the beginning of yield optimization.

**Statistical response plot, SRP**

A statistical response plot is a plot of all the responses encountered during the statistical simulation. Usually the response is plotted versus the independent variable, such as S11 versus frequency. An SRP gives a measure of the response variations that occur due to the defined statistical parameter variations. An example of a statistical response plot is given in Figure 5.

Figure 5 — A statistical response plot

A statistical response plot displays the type of measurement variations that are possible, due to the statistical variations given to the unit's parameters.

**Yield Sensitivity Histogram, YSH**

The yield sensitivity histogram is a "graph" of yield, on the vertical axis, versus a circuit parameter's (stepped) values on the horizontal axis.

Of all the statistical data displays, the YSH is usually the most helpful because it shows which parameters affect the design's yield and how to possibly change the parameters to increase yield.

The yield sensitivity histogram gives an indication of whether the design is at maximum yield (a *centered* design) or whether the design needs to be yield optimized (an *uncentered* design.) The yield sensitivity histogram also tells the designer which parameters in the design affect the design yield and need to be included in the yield optimization.

An example YSH is shown below in Figure 6. The vertical axis (0-100) is yield in percent, and the horizontal axis (30-42) is the range of parameter values for a given component.

Figure 6 — A Yield Sensitivity Histogram

**Interpreting the yield sensitivity histogram**

The YSH is a plot of yield versus one of your design's parameter values. The parameter value being graphed is not thought of as a statistical variable, but *all* other parameters are allowed to vary according to their assigned statistical distributions. Yield is calculated for each step as the parameter is stepped across its allowable range of variation.

The YSH is the graph of the estimated yield versus each of the stepped parameter values. For example, looking at Figure 6, when curVar (a component, like a capacitance or inductance) is fixed at 32, the estimated circuit yield is approximately 95%. When curVar is fixed at 40, the estimated yield is 44%.

The lower limit and the upper limit used on the YSH plot axes are the upper and lower extent of the statistical parameter.

If the YSH is essentially flat, then the parameter over the range from the lower limit (LL) to the upper limit (UL) does not affect the design's yield. This is shown in Figure 7(d). In this case we say the parameter is centered.

It may not be necessary to include this parameter in yield optimization, as this parameter (on its present range) has no affect on yield. It may also be possible to increase the tolerance of this parameter without decreasing the yield.

Figure 7 — How to use the yield sensitivity histogram

If the YSH slopes, as in Figures 7(a) and (b), the parameter affects the yield value, and we say the parameter is not centered. Moving the parameter's nominal value to a value of higher yield may increase the design's overall yield.

Each rectangle in a YSH is called a bin. The height of each bin is a yield estimate using the measurements from the simulation trials with parameter values within the interval covered by the bin's base. Confidence intervals for each bin's height should be calculated.

If the YSH is high in the center and lower on the extremes, like in figure 7.3(c), the upper and lower limits (UL and LL) need to be adjusted. The extent of a parameter's variation is its tolerance, and in this case the parameter tolerance should be reduced.

**Statistical sensitivity**

Looking at the yield sensitivity histogram in Figure 8, the *statistical sensitivity* is the slope of the histogram. A parameter whose YSH has a large slope, like shown in Figure 8, is said to be a statistically sensitive parameter.

Figure 8 — Statistical sensitivity

Because each bin height represents a yield estimate, a YSH using a small number of trials can be rough and erratic. This is due to numerical estimation errors. The true yield versus parameter plots will always be smooth functions.

**Statistical sensitivity reduction**

The idea of statistical sensitivity reduction, which is the essence of design centering, is illustrated in Figure 9.

Figure 9 — (a) YSH before design centering, (b) YSH after design centering

From Figure 9(a) we see the parameter nominal value (the center of the YSH) is 35Ω and that when the parameter value is above 36Ω the yield is zero. As the parameter value decreases from 35Ω, the yield increases. From the slope of this YSH, we see that there is a large statistical sensitivity to this parameter value.

After statistical optimization, the YSH for this parameter is shown in Figure 9(b). After yield optimization (design centering) we see that this parameter's YSH has no dominant slope in either direction, and we say this parameter is *centered.* (From 9(b) it can be seen that the YSH decreases in both directions from the nominal value of 28Ω. Therefore reducing this parameter's tolerance will increase the yield.) The estimated yield corresponding to 9.5(a) is approximately 25%, while the estimated yield corresponding to 9.5(b) is approximately 86%.

A normalized statistical sensitivity (NSS) is defined as:

For the YSH in Figure 8, the NSS is:

Therefore an increase (the NSS is positive) in the parameter value by 1% will increase the yield by 2.5%. You will want to know the statistical sensitivity of every statistical parameter in your design.

**Example: low noise amplifier**

The circuit and initial single-point design and optimization come from the ADS 2001 Power Amplifier Design Guide examples section (LNA_prj). The one transistor circuit is shown in Figure 10.

Figure 10 — LNA example circuit with matching circuits highlighted

The initial design and optimization specifications for this circuit are:

- 3 V supply, 2mA collector current
- Noise figure as low as possible at 2 GHz
- S21 > 10 dB at 2 GHz
- S11 and S22 < -10="" db="" at="" 2="" ghz="">
- Unconditionally stable

- Choose transistor
- Design bias network, determine stability
- Add stabilization network
- Determine input and output impedance of the transistor
- Design input matching circuit
- Design output matching circuit
- Simulate the response
- Single-point optimize the design

**Statistical analysis of the LNA**

Following the steps for statistical design given in Figure 3, we statistically analyze and then optimize this design.

**1. Pick statistical parameters.** The input and output matching structures are chosen to have the statistical variables. The matching structures are highlighted in Figure 10.

**2. Assign parameter statistics.** The Uniform +/-10% distribution is assigned to each matching component parameter. The choice of statistical model directly affects the estimated yield value. But statistical sensitivities are not strongly affected by the choice of statistical model. Therefore, this simple model will be effective in identifying and reducing the statistical sensitivity of this circuit.

**3. Set yield specifications.** The yield specifications are set at:

- 3 V supply, 2mA collector current
- S21 > 8 dB at 2 GHz
- S11 and S22 < -6.5="" db="" at="" 1.8ghz="">< f="">< 2.2="" ghz="">
- Unconditionally stable

**4. Calculate yield.** The calculated yield is 91%, using 500 trials.

**5. Examine the YSH's for all statistical parameters.** Figures 11 and 12 show the YSH's for input and output matching component parameters (C2, L2 (input) and C3, L3 (output)).

Figure 11 — Statistical analysis of the input match, YSH

Figure 12 — Statistical analysis of the output match, YSH

It is easy to see that the parameters describing the input components C2 and L2 are centered, while the parameters describing the output components C3 and L3 are not centered.

**6. Estimate the statistical sensitivities.** The normalized statistical sensitivities, taken from Figures 11 and 12, are given in Table 1.

Table 1 — Normalized statistical sensitivities from figures 11 and 12

**7. Perform yield optimization.** Because statistical sensitivity was detected in the output matching parameters, a yield optimization was performed. Also, using ADS2001, programmed optimization is now possible. Here yield optimization is first performed on the input, then on the output, then followed by an overall final yield optimization of the entire circuit.

**8. Perform yield analysis,** verifying the results of optimization. The results for the output match are shown in Figure 13. The resulting yield is 100%. At this point the yield specs can be tightened to determine any additional sensitivities in this design-centered design.

A measurement histogram (MH) will help you see the new statistical performance of this design and will help you set new specifications if desired. The parameter values before and after yield optimization are shown in Table 2.

Figure 13 — YSH plots after yield optimization

Table 2 — Parameter values before and after design centering

**Discussion of LNA example**

We started with a design that was optimized for performance at a single set of parameter values: a single-point optimized design. We saw that this design, while high performance, was not high yield. This is often the case.

Single-point optimized designs are often not high yield designs. Statistical analysis and design are necessary to optimize statistical performances like yield.

The steps for statistical design given in Figure 3 are easily accomplished using present-day CAD software.

**Conclusions**

Breakthroughs in present-day CAD software are allowing the design engineer to easily and efficiently incorporate the parametric variation of manufacturing into the initial design process. The key points presented here are:

- A statistical analysis, including minimizing statistical sensitivities, will result in a more manufacturable design.
- Single point optimization can result in unnecessary statistical sensitivity in your design. Be careful!
- Yield Sensitivity Histograms show the statistical sensitivities in a design and will help determine if yield optimization is needed.
- Normalized statistical sensitivity quantifies a parameter's statistical sensitivity.
- Yield optimization increases yield and minimizes statistical sensitivities.
- Statistical design tools are presently available in commercial design platforms.

**Glossary**

Component — a circuit element like a R, L, or transmission line.

Parameter — a number defining a component's value: like 57pF for a capacitor.

Unit — a design objective like an amplifier or oscillator.

Performance — the calculated or measured response of a unit, like a combination of S11, S22, S21 and group delay.

Manufacturability — the sensitivity of a unit's performance to the statistical parameter variations encountered during manufacturing.

Nominal Parameter Value — a single parameter value used to describe a component, usually the parameter mean if the parameter is a statistical variable.

Tolerance — the extent of a parameter's variation during manufacturing.

Single-point design — maximizing a unit's performance for a single set of parameter values.

Statistical design — maximizing performance statistics due to parameter variations.

Statistical model — a probability distribution assigned to a parameter, either mathematically or with a set of measured values.

CAD — Computer Aided Design.

**References**

ADS 2001 Power Amplifier DesignGuide Reference Manual, Chapter 9.

M. Meehan and J. Purviance, Yield and Reliability in Microwave Circuit and System Design, Artech House, 1993.

J. Purviance, Monte Carlo Methods in Statistical Design, IEEE MTT-S 2001. International Microwave Symposium Workshops and Short Courses, WMB: Statistical Design and Modeling Techniques for Microwave CAD.

J. Purviance and M. Meehan, "A Sensitivity Figure for Yield Improvement," IEEE Trans. on Microwave Theory and Techniques, Vol. 36, No. 2, Feb 1988, pp. 413-417.

*Dr. John Purviance, consultant to industry, helps his clients understand and use CAD yield analysis and optimization tools to design high yield microwave and high speed digital circuits. He has 20 years experience in CAD related to high yield design, statistical sensitivity reduction and statistical modeling and has authored over 30 technical papers in the field of design for high yield. He can be reached at purviancej@galacticomm.org.*

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