Good Grief! It can't be 2005 already! It seems like I only just finished with my 2000 celebrations, and yet another five years has slipped through my fingers (I'm too young for all of this).
There's currently so much going on that my head is spinning. Everywhere one turns, the EDA mavens are coming up with ultra-cool things with which to tease and delight us. Thus, in this column, I thought I'd present a little smorgasbord summarizing a couple of the topics that have meandered their way across my desk in recent weeks.
New ASIC and FPGA verification book
An interesting new book arrived in my postbag the other day "ASIC and FPGA Verification: A Guide to Component Modeling." Penned by Richard Munden, who co-founded the Free Model Foundry in 1995, this tome provides a great introduction to the concepts associated with the verification of ASICs and FPGAs in the context of a board or system.
Programming FPGAs in C
Over the last couple of years, a number of C-based methodologies and tools have become available for FPGA designers. However, these tend to be focused on satisfying the requirements of the hardware design engineers. The folks at Impulse have taken a somewhat different tack by creating a design environment that is equally applicable to both hardware and software developers.
In the case of DSP algorithms, for example, the folks at Impulse can show you how to take your C code representation and use it to "program" an FPGA to implement your algorithms directly in hardware. But these techniques are not limited only to DSP algorithms; they are also of interest to embedded application developers in general.
The idea is that you can view all or part of an FPGA as being "just another programmable core." The difference being that, instead of running your code on an embedded (soft or hard) microprocessor core, you can now decide to implement appropriate portions of the code directly in hardware so as to achieve phenomenal increases in performance.
In addition to their CoDeveloper tool, the folks at Impulse have just finished writing a book called "Practical FPGA Programming in C" which should hit the streets sometime in the first half of 2005.
Easy-to-deploy formal verification
I personally am a huge fan of formal verification at least, insofar as the concepts behind it. Truth to tell, however, I haven't actually used any formal verification tools "in anger' per se. This is because I'm usually up to my ears in alligators and simply don't have the time to wade through the (usually highly intensive) learning process associated with most formal verification offerings.
Thus, I was happy to hear from the folks at Real Intent who are devoted to providing easily deployable and usable formal verification technology. Gathered under the family name of Verix, the guys and gals at Real Intent are fielding three highly-integrated products: Verix IIV, CIV, and EIV.
First we have Verix-IIV (Implied Intent Verification). This is claimed to be the industry's easiest-to-use formal ABV product, because designers can have it up and running within minutes of installation. The Verix-IIV tool automatically extracts assertions from the RTL associated with a design and then formally verifies them.
Next comes Verix-CIV (Clock Intent Verification), which automatically analyzes the RTL to detect the typical problems associated with multi-clock-domain designs (meta-stability, reset synchronization, glitch elimination, inadequate hold times, and loss of correlation). Furthermore, Verix-CIV automatically generates appropriate assertions and then formally verifies them to validate the logical correctness of the design's synchronization scheme.
And last but certainly not least, Verix-EIV (Expressed Intent Verification) allows us [the users] to verify complex design behavior by writing our own design assertions. These assertions are defined using standard assertion formats such as SystemVerilog, the Property Specification Language (PSL), or the Open Verification Library (OVL).
A cool way to capture video processing applications
As usual, the folks at Celoxica have been slaving away enhancing their DK Design Suite, and their recent 3.1 release has more features than you can swing a stick at.
One really cool tool that became available alongside this 3.1 release is called PixelStreams. In conjunction with a graphical editor utility, this block-based IP offering is specifically focused on making it easy to capture the functionality of imaging and video processing applications.
Using the block-based graphical entry tool, you define your application as a series of image/video processing algorithmic blocks that you connect together. Underneath each graphical block is a corresponding model written in Celixica's Handel-C (you can also create your own blocks as required).
Once you've captured and verified your design, the DK Design Suite can be used to synthesize corresponding RTL for use with traditional synthesis offerings. Alternatively, the DK Design Suite can be used to directly output an optimized FPGA hardware implementation.
Migrating designs from Matlab to RTL
The cool thing about EDA is that there are so many different ideas floating around. For some time now, the guys and gals at AccelChip have been promoting their own flavor of synthesis technology that allows you to migrate your designs from pure Matlab M-Code into equivalent RTL.
Truth to tell, I didn't really have a good grasp on the AccelChip approach until recently, but now I think I'm starting to wrap my brain around what they've been up to. First of all, it's necessary to understand that Matlab allows you to represent complex functions at a very high level of abstraction. For example, a Fast Fourier Transform (FFT) can be described by simply stating "y = fft(x)".
One problem is that the original Matlab representations are based of floating-point, so we need some way to coerce them into equivalent fixed-point versions. Another consideration is that Matlab doesn't support the concept of discrete time. Thus, it would be possible to present the input to the FFT with an entire frame of data and immediately receive a corresponding frame of output without any time having elapsed.
Furthermore, there is a plethora of ways in which one might wish to implement the "guts" of the FFT. Not surprisingly, therefore, it's difficult to come up with a completely automated route for converting pure Matlab code into RTL.
In order to address this, the folks at AccelChip have created an interface that allows you go through the original Matlab code, take generic instances like "y = fft(x)," and associate each of these instances with a more specific instantiation such as "y = my-fft(x)". They also provide a forms-based interface that allows you to associate implementation-specific details with each instance, such as the fixed-point data types associated with the various signals and the required architecture for the function.
For example, in the case of an FFT, you can choose between radix-2 ("butterfly"), radix-4 ("dragonfly"), or radix-8 ("spider"); serial IO or array I/O; pipelined or non-pipelined; and so forth. Once you have performed this task for all of the instances, you press the "GO" button and the equivalent RTL pops out of the other end.
A different type of FPGA-based verification solution
Some designs are so huge that they demand the use of traditional multi-million dollar hardware emulation systems. However, a large proportion of embedded system designs fall in the 300k gate to 10M gate region. The introduction of today's extremely high-density FPGAs containing millions of equivalent gates means that the verification requirements of these designs can be addressed by the new generation of affordable FPGA-based prototyping platforms.
For example, the ZeBu (for Zero Bugs) platform from EVE occupies a single PCI card that can be plugged directly into a PC.
Running at 10MHz or higher, the ZeBu provides the speed necessary to address the requirements of hardware-software co-design, integration, and co-verification. Furthermore, by providing a transaction-level interface (based on the Accellera industry standard), the ZeBu allows the design to be tested in the context of its real-world environment.
"Cool Beans" to everyone
There are tons of other cool offerings out there, but we'll have to leave those for another day. Suffice it to say that I think everyone mentioned here deserves an official "Cool Beans" award for making all of our lives so much more interesting and who knows what we will see in 2005? Until next time, have a good one!
Clive (Max) Maxfield is president of Techbites Interactive, a marketing consultancy firm specializing in high-tech.