Altera expects to get a 25 to 30% speed boost by moving to an all-copper interconnect, together with a shrink, in a new family of programmable logic chips that starts shipping early next year.
In March, the company said it was looking at whether it should use a 0.13 or a 0.15µm process to build its first chips with all-copper interconnect. Its foundry TSMC produced a test chip based on 0.13µm, but Altera has opted for a 0.15µm process as an interim step, according to Paul Hollingworth, Altera's European marketing manager.
"We wanted to get to all-layer copper quickly," he said. "With 0.13µm, there is an issue of which low-k dielectric to use. But TSMC is still one-and-a-half years ahead of the SIA [Semiconductor Industries Association] roadmap."
Hollingworth says the company expects to be able to deploy parts based on TSMC's 0.13µm process at the end of 2001. On the 0.15µm process, Altera is moving the larger parts in its Apex 20K family to the copper-based range, tagged 20Kc.
"The larger parts get the biggest dual benefit of higher performance and die size and, therefore, cost reduction," added Hollingworth. "We will not do Excalibur on 0.15µm. We will move those to 0.13µm at the end of the year."
In contrast to Xilinx, which has used copper in the top two layers of its Virtex-EM family to improve power distribution across the chip, Altera decided it wanted to go for an all-layer approach.
"There is a significant difference between doing copper properly and doing it only on a few layers. You only get the speed benefit if you do it on all layers," said Hollingworth. "A lot of TSMC's work was done on the basis of what we needed. [The PLD] is a superb test for the fab and is the technology driver for their processes."
He says the company expects to start shipping products made on 300mm wafers before 2002.
"Three hundred millimetre is coming forward considerably faster than expected," he said. "Everyone is talking 2003, but the current story is next year for real products. That brings forward the date for the real cost reductions we can see from 300mm wafers."