# VHDL-AMS simulation for battery chargers

The Maxim 2003, and a parameterized NiCd battery model, were created using the VeriBest behavioural modelling language DIABLO. Although many SPICE simulators nowadays provide some high-level modelling capability, none of these proprietary languages are compatible with one another. With the introduction of VHDL-AMS - where AMS stands for Analog and Mixed-Signal - there is at last a standard language to allow the simulation of mixed-signal designs. IEEE std. 1076.1-1999 is the official name for the language, and it is important to note that it is a strict superset of VHDL 1076-1993. This means that any legal VHDL-1076 description is allowed.

It provides the ability to describe and simulate mixed-signal systems (both electrical and non-electrical) from the system level down to the transistor level, and is not dependent on a particular simulation engine or environment.

As an exercise in model creation, the Maxim 2003 and the NiCd battery model have been converted to VHDL-AMS. The complete design was then simulated (in conjunction with standard SPICE models) and the results compared to those obtained in the previous implementation.

**The Circuit to Be Simulated**

The simulation environment used for this task was Mentor Graphics' ADVanceMS, which is capable of simulating a complete analog and digital design, using combinations of SPICE, VHDL (with VITAL), VHDL-AMS, Verilog, and user-defined C functions. ELDO is the analog engine used by AdvanceMS to solve the differential algebraic equations defined within the VHDL-AMS models.

In order to allow simulation of physical systems with different disciplines, the 1076.1 standard includes new conservative connection semantics. Quantities are used to represent continuous time or frequency waveforms that may only take floating-point values, and are available in three varieties: free, branch and source.

Branch quantities (across and through) represent the unknowns in the differential algebraic equations that are solved by the analog solver.

These quantities are connected to terminals that represent abstract connection points in the model where conservation laws must be satisfied. For example, Kirchoff's laws (KVL and KCL) for electrical circuits. The easiest way to explain this process is through an example.

**The NiCd battery model**

Shown here is a portion of the VHDL-AMS code for the NiCd model.

**An NiCd charger in VHDL-AMS**

The NiCd battery consists of the usual VHDL entity-architecture pair, and has been created as a parameterised model. For use with the Maxim 2003 controller, the testbench instantiates the battery model with a capacity of 800mAH, 6 cells, and zero percent state-of-charge. Note that two ports are defined (pos and neg) of type terminal.

Terminals are special objects because they do not have a type, but instead they belong to a nature. In this case the nature (or discipline) is electrical. This means that the quantities vcell and icell (defined in the architecture bhv) represent the voltage and current respectively. The quantity icell is a measure of the current flow into and out of the battery, and ileak represents the leakage current.

The leakage current was then simply defined as:

-- Calculate current leakage in the battery vcell == ileak * 10.0e3;

Simultaneous statements (such as the one shown above) provide a notation to describe differential and algebraic equations (DAEs) and form the basis for the description of continuous behaviour. Reference may be made to one or more quantities whose values may be computed by the analog solver (in this case - ELDO).

Simultaneous statements may appear anywhere a concurrent statement is allowed, and can appear in any order. The statement is totally symmetrical in that the left and right-hand side expressions may be interchanged without any influence on the computed result.

The terminal voltage of a NiCd battery is dependent on the past history of the cell, and is also a function of the charge rate. These non-linearities in the terminal voltage were modelled using an exponential expression.

**The Maxim 2003 controller**

The methodology used to implement the VHDL-AMS representation of this device was similar to that employed previously, in as much as the "Charge Control" was implemented using a 5-state Moore state machine. Although VHDL in general is a very verbose language, the controller model was easier to write for a number of reasons.

Apart from the fact that it's easier the second time around, there were two aspects that VHDL-AMS was able to handle in an easier manner than DIABLO.

Firstly, DIABLO functions return a value that is associated with the current time point undergoing a transient calculation, not the last converged time point. The time flow mechanism employs a variable called time_flag that must be evaluated to determine whether the simulation is moving forward in time and converged on the last time point. Using this method the user can acquire the last converged value.

In VHDL-AMS the values returned from the analog solver always represent converged time points.

This was particularly evident when constructing the NiCd battery model where the accumulation of charge within the device was required.

Secondly, the detection of the negative delta voltage (-DV) was previously a fairly complicated process, involving the setting of a breakpoint at (time + 34) seconds to ensure that the simulator would provide a result at the defined time.

The difference between the values at time and (time + 34) could then be used to determine the presence of a negative delta voltage. In VHDL-AMS the process of setting breakpoints was simplified to one line:

-- Battery sense storage old_vsense == vsense'delayed(34.0);

Hence, the negative delta voltage condition was easily detected by determining the difference between vsense and old_sense while in the fast-charge mode (state 4).

**Modelling digital/analog interaction**

It is perfectly legitimate to use signals within simultaneous statements, provided the expressions still evaluate to floating-point values. For example:

va == inertial_voltage;

where va is a free quantity and inertial_voltage is a signal of type real.

Since the NiCd battery exhibits a non-linear voltage across its terminals that is dependent on its history and on the charging conditions, the inertial_voltage signal represents these situations, but in a discontinuous manner. The battery is unable to respond immediately, so the model also contains a delayed response to this signal.

The analog solver computes the value of the simultaneous statement such that the differential voltage is close to zero. The problem here is that the inertial_voltage signal is likely to cause discontinuities in the value of the quantity va. If not handled appropriately, the simulator may fail to find a solution to the system of equations that describe the analog part of the model.

As with any analog behavioural modelling language, the model writer must explicitly notify the simulator of any such discontinuities.

With the previous implementation in DIABLO, the function generating the discontinuity was declared using STEP_FUNC instead of the usual FUNC keyword.

In VHDL-AMS the break statement is a concurrent statement that serves a similar purpose. It also allows the model to define a new set of initial conditions to use for the next continuous time interval.

For example, to announce a discontinuity on the inertial_voltage signal is simply:

break on inertial_voltage;

A VHDL-AMS model that has a discontinuity on a quantity at some time and does not execute a break statement is deemed erroneous.

The result could be either the generation of incorrect results or nonconvergence. The effect of the break statement on the simulator is to force another delta cycle during the simulation. This forces the analog solver to resume execution at the same simulation time, and to re-calculate the values of the quantities.

**The complete circuit**

Since the fast-charge battery controller consists of more than just the NiCd battery and the Maxim 2003 controller, the other components need to be included in the simulation. Unfortunately there are no readily available VHDL-AMS models for the discrete components, and the IEEE-1076.1 standard does not possess the capability to include SPICE models within a VHDL-AMS simulation. However, AdvanceMS does have the ability to perform a mixed SPICE/VHDL simulation. Therefore, it was a relatively simple matter of taking the original SPICE netlist, removing the NiCd battery and Maxim 2003 instances, and converting it to a subcircuit. An entity-architecture pair was then created for the discrete circuitry, where the architecture contains references to the name of the subcircuit and the file location. And finally, the discrete circuitry is instantiated in the testbench:

X1: entity discrete_circuitry(spice) port map (dc_source => dc_supply, vcc => vcc_supply, battery => battery, modu => modu, dis => dis, ts => ts, sns => sns, bat => bat); With reference to the figure - which shows the Xelga graphical post-processor, that is capable of operating on both analog and digital waveforms - the battery charging voltage was set to 14V, and the fast-charge controller power supply was turned on after 100s. Initially the charge_enable input was enabled at power-up, but with the state-of-charge (SOC) set to 0 percent the NiCd battery was first trickle-charged until it reached 1V/cell (6V in this case).

**The Simulation Post-Processor**

Upon reaching this level the charger switches to fast-charge mode until the negative-delta slope is detected, whereupon it switches back to state 1 (power-up mode). After 8000s the discharge_enable input goes high and the battery is rapidly discharged through a 9-ohm 10W resistor.

The purpose of this exercise was primarily to investigate the ability of VHDL-AMS (IEEE-1076.1) to simulate the charger circuit and to compare its capabilities with the more traditional A/D approach. In the original implementation the operation of the analog simulator had to be taken into account to ensure that correct results were obtained. In addition, it is not possible to perform simulations that contain large amounts of digital circuitry, particularly if created using VHDL or Verilog. With VHDL-AMS there are no problems associated with simulating A/D circuits, although there is no native capability for including SPICE subcircuits or models. Advance MS, however, did provide this missing functionality and the complete design was simulated without any major problems.

The task of converting the DIABLO-based models to VHDL-AMS was easier than expected. Clearly, the inclusion of other parameters and capabilities within the models may be required for more detailed simulations, but (as with all simulation model creation) it is important to only make the model as complex as necessary to obtain the correct results.

**References**

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