SAN JOSE, Calif. – Intel is sampling a communications chip aiming to win sockets from the likes of Cavium, Freescale and NetLogic in packet processing. Cave Creek is a new companion chip that together with the latest Xeon processors can handle up to 160 million packets per second of Layer 3 traffic.
The Xeon and Cave Creek pairing, known as Crystal Forest, marks an attempt by Intel to shift up into handling jobs in the so-called data plane, focused on moving bulk packets quickly. To date, the x86 has made significant inroads as a control-plane processor handling less demanding tasks supervising the operations of a communications system.
Intel’s goal is to drive an expanding set of communications tasks to the x86. In 2013 or beyond, it plans to roll out another Xeon companion chip, this time targeted at DSP jobs for wireless base stations.
The future chip will come with a set of Intel signal processing libraries now in the works for handling Layer 1 baseband processing on next-generation Xeon processors. Base stations using the chips will still need some external parts such as Viterbi decoders.
Intel said Cave Creek will be in production before the end of the year. It targets a broad range of comms systems from “small- to medium-sized firewalls to high-end routers,” Intel said in a press statement.
Specifically, Cave Creek is based on a Xeon companion chip, removing peripherals specific to servers and adding new ones for comms. The major new cores include hardware accelerators for cryptography, compression and pattern matching including fixed-string and regular expression operations.
The cores are part of Intel’s so-called Quick Assist technology that includes APIs for running compression and security jobs on the Xeon x86 cores. The hardware accelerators are new versions of cores used in previous Intel chips such as the unsuccessful Tolapi SoC and Intel’s IXP 2800 network processor now sold through a third party, Netronome.
In addition, Cave Creek includes four Gbit/s Ethernet MACs and support for USB and serial ATA. The 32 nm chip is sampling now and is optimized for use with the latest Sandy Bridge versions of Xeon. It can also be paired with Intel notebook chips such as the Core i3, i5 and i7 for comms systems that value low power over high performance needs.
As for supporting software, Intel said it will release a set of software libraries and algorithms called the Intel Data Plane Development Kit to help accelerate use of the x86 in high-end packet processing. Intel promised the software will deliver five-fold performance increases in x86-based packet processing.
Intel’s Wind River division will make available a Simics model of the Crystal Forest platform. The model aims to help users test various configurations of the chip and start software development for it.