Breaking News
News & Analysis

Tabula’s next-gen FPGAs to use Intel’s 22nm process featuring 3-D tri-gate transistors

2/21/2012 04:52 PM EST
1 Comment
More Related Links
View Comments: Newest First | Oldest First | Threaded View
User Rank
re: Tabula's next-gen FPGAs to use Intel's 22nm process featuring 3-D tri-gate transistors
PJames   2/21/2012 8:33:32 PM
The one thing I've noticed missing from any discussion of the Tabula technology is the power efficiency. Based on the lack of discussion, the fact that the "3D" technique they are using means higher clock speeds and the fact that there seems to be a focus on high end networking applications... I'm guessing the power efficiency is less than traditional FPGAs? Though perhaps the reduced interconnect length combined with Intel's FINFETs would tip the scale in the other direction? Perhaps something for EE Times to ask when next covering Tabula.

Like Us on Facebook
EE Times on Twitter
EE Times Twitter Feed